From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47362C47DDB for ; Tue, 23 Jan 2024 11:08:44 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id D5B3E8D0005; Tue, 23 Jan 2024 06:08:43 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id CE44E8D0001; Tue, 23 Jan 2024 06:08:43 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id B5E348D0005; Tue, 23 Jan 2024 06:08:43 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id A06048D0001 for ; Tue, 23 Jan 2024 06:08:43 -0500 (EST) Received: from smtpin25.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay10.hostedemail.com (Postfix) with ESMTP id 61671C0A94 for ; Tue, 23 Jan 2024 11:08:43 +0000 (UTC) X-FDA: 81710302926.25.D6B58BF Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf10.hostedemail.com (Postfix) with ESMTP id 860E4C0017 for ; Tue, 23 Jan 2024 11:08:41 +0000 (UTC) Authentication-Results: imf10.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf10.hostedemail.com: domain of ryan.roberts@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=ryan.roberts@arm.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1706008121; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ae9PEWvSy2rOpn0fNN1yWKPzvW5maiMWronK26cZndU=; b=LZs5TRY6qr9huoezT+W7W2EKF2scQKShfVZkTEWPtUsaTx2RLWvCKRfeDPReSDkiXqRKs2 Dd/SBP/hk5ZP21XiE1qVGPTuuBmn8HaCzvLw9g9bAkTGQf627OxkDPvEJfvU0HCB0tB82Q ZLg+gxfm/B5JC8q5FhoTrAFTivXpXpI= ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf10.hostedemail.com: domain of ryan.roberts@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=ryan.roberts@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1706008121; a=rsa-sha256; cv=none; b=mRiG5ZZnGH2oBRoPf9+smc4Vp5q551NdCeefwX1NusCPXRPIHUip3RvcBLW3C+tvv8HQky NHE4La7F/i23EBqEmMXfCroaIOU1LyscCsSOKKXiNSHH5shhgbbMGEeJPxZXAMpd1ciANQ eaysPgy+dvn4+8ySqvQiA2/TIBOX268= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0AADC1FB; Tue, 23 Jan 2024 03:09:26 -0800 (PST) Received: from [10.57.77.165] (unknown [10.57.77.165]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3DDC23F762; Tue, 23 Jan 2024 03:08:35 -0800 (PST) Message-ID: <6703b648-10ab-4fea-b7f1-75421319465b@arm.com> Date: Tue, 23 Jan 2024 11:08:33 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 01/11] arm/pgtable: define PFN_PTE_SHIFT on arm and arm64 Content-Language: en-GB To: David Hildenbrand , linux-kernel@vger.kernel.org Cc: linux-mm@kvack.org, Andrew Morton , Matthew Wilcox , Russell King , Catalin Marinas , Will Deacon , Dinh Nguyen , Michael Ellerman , Nicholas Piggin , Christophe Leroy , "Aneesh Kumar K.V" , "Naveen N. Rao" , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexander Gordeev , Gerald Schaefer , Heiko Carstens , Vasily Gorbik , Christian Borntraeger , Sven Schnelle , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org References: <20240122194200.381241-1-david@redhat.com> <20240122194200.381241-2-david@redhat.com> <46080ac1-7789-499b-b7f3-0231d7bd6de7@redhat.com> From: Ryan Roberts In-Reply-To: <46080ac1-7789-499b-b7f3-0231d7bd6de7@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 860E4C0017 X-Stat-Signature: 1dt454ty39hf6pswfdj531ekmnr6e7qj X-HE-Tag: 1706008121-670440 X-HE-Meta: U2FsdGVkX1/AQiX/MFaL4AGBZNdnGM3GzFjwjIt9VUc5GZG5Ql9jI6/2Oxpz+HeRGEflkVsvZmNIixz7y/DhzBtniASmSxgs1q2XbrurHYgnPevyvPHTWB2jh0HG7Cz84rkkyNyNl3vQ9bHpqUMmLTf/IsmYbtgvXQNZEk4R6NDDFBxycBLsYwlxgCbIpBtt6/YGTBIDv4NDnSsY5Xr9m4wRbvXxYPldxAVmmPZyESLWwJ8c/+vahHXfusBk5J23OAqeDYTwinu15t7P0iy8wd/4+qxClCa5PLyHzl3kT7phzBkjeeg2gWsO+n8Dy8lsHALHcMK2xBxsb4LhWZ9x/R9bBQ44a9rvgi3Nm/t56NIt5q9ctuF0vxd8kcgTYvtACWZEpPypYbiwIlKhNxlPXUw52TIaO+kkbWMCzPD7LL0M/HtrjuoafWOfaKvm7VIee8rivgbJaZpFalqXOAefW3RTaoBN3jQvAf4UFrBTwz1lbMVp1ve2H/fXIOF1bhYnYUnihHm0V/IuRov8wDNwvDCJBXqM01GPcPTh95iRFLwHcfDIiAKVwVLO/H+vV4e5NCouCtMxKCfM+UpxqmdWW6XLaHYEBLhkGMtfrG3riHE1ydZSBQayKhPBvzBxe5aW7NnAgPgi9tHFA1A5VbN2O8JzYaB5BE6UBU1GAFcRUvTiQYKmqEfY6YDIP41u7ZXjaGi7zoALjuqLBAbo07mh8ZexP2CE5/j90hHZloEx4DP5ikv74NIpO2WCnSxM2FbtZ62q2KNOWFa7mC0h5gMr57IGecHgdxAyBYSo+eJX10U/HLzzILO7zWcGAT6umvBancEZp0rgAGV5du+dn8V+fYXFbs8gqFLZ2+ZxMwTuX8uGgCSz/5G2iNBV9eYIdbhYpur12CHIyMIwzbv56DviLeIpDzMsffpv9JLmEiLCJ6manVDulflhO68ae+AmEzf+sLz/xw3XsdzMKbEZrjz v+XsBlNU XyyebB6loa7ZPwpYCz22flwqEeTR84kaFIcEO5AriSveTZAOkLy0+zNvchDGgPXlocw04dAz+sD7JwvIkmb+KdqE+xjo75IOERP2bEkDvU3j3nsndlYv8ltQYTiw2vmUNGZRuKeuVCibr1BVYDMCqIOfWt/lLAlHFvLu2Qj5E/l7gPEcDFNe3sAKc4CD5DTiSjRFXPtO+oPXBErfE0Tzkt7rksmrhTSVngNHF X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 23/01/2024 10:48, David Hildenbrand wrote: > On 23.01.24 11:34, Ryan Roberts wrote: >> On 22/01/2024 19:41, David Hildenbrand wrote: >>> We want to make use of pte_next_pfn() outside of set_ptes(). Let's >>> simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). >>> >>> Signed-off-by: David Hildenbrand >>> --- >>>   arch/arm/include/asm/pgtable.h   | 2 ++ >>>   arch/arm64/include/asm/pgtable.h | 2 ++ >>>   2 files changed, 4 insertions(+) >>> >>> diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h >>> index d657b84b6bf70..be91e376df79e 100644 >>> --- a/arch/arm/include/asm/pgtable.h >>> +++ b/arch/arm/include/asm/pgtable.h >>> @@ -209,6 +209,8 @@ static inline void __sync_icache_dcache(pte_t pteval) >>>   extern void __sync_icache_dcache(pte_t pteval); >>>   #endif >>>   +#define PFN_PTE_SHIFT        PAGE_SHIFT >>> + >>>   void set_ptes(struct mm_struct *mm, unsigned long addr, >>>                 pte_t *ptep, pte_t pteval, unsigned int nr); >>>   #define set_ptes set_ptes >>> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h >>> index 79ce70fbb751c..d4b3bd96e3304 100644 >>> --- a/arch/arm64/include/asm/pgtable.h >>> +++ b/arch/arm64/include/asm/pgtable.h >>> @@ -341,6 +341,8 @@ static inline void __sync_cache_and_tags(pte_t pte, >>> unsigned int nr_pages) >>>           mte_sync_tags(pte, nr_pages); >>>   } >>>   +#define PFN_PTE_SHIFT        PAGE_SHIFT >> >> I think this is buggy. And so is the arm64 implementation of set_ptes(). It >> works fine for 48-bit output address, but for 52-bit OAs, the high bits are not >> kept contigously, so if you happen to be setting a mapping for which the >> physical memory block straddles bit 48, this won't work. > > Right, as soon as the PTE bits are not contiguous, this stops working, just like > set_ptes() would, which I used as orientation. > >> >> Today, only the 64K base page config can support 52 bits, and for this, >> OA[51:48] are stored in PTE[15:12]. But 52 bits for 4K and 16K base pages is >> coming (hopefully v6.9) and in this case OA[51:50] are stored in PTE[9:8]. >> Fortunately we already have helpers in arm64 to abstract this. >> >> So I think arm64 will want to define its own pte_next_pfn(): >> >> #define pte_next_pfn pte_next_pfn >> static inline pte_t pte_next_pfn(pte_t pte) >> { >>     return pfn_pte(pte_pfn(pte) + 1, pte_pgprot(pte)); >> } >> >> I'll do a separate patch to fix the already broken arm64 set_ptes() >> implementation. > > Make sense. > >> >> I'm not sure if this type of problem might also apply to other arches? > > I saw similar handling in the PPC implementation of set_ptes, but was not able > to convince me that it is actually required there. > > pte_pfn on ppc does: > > static inline unsigned long pte_pfn(pte_t pte) > { >     return (pte_val(pte) & PTE_RPN_MASK) >> PTE_RPN_SHIFT; > } > > But that means that the PFNs *are* contiguous. all the ppc pfn_pte() implementations also only shift the pfn, so I think ppc is safe to just define PFN_PTE_SHIFT. Although 2 of the 3 implementations shift by PTE_RPN_SHIFT and the other shifts by PAGE_SIZE, so you might want to define PFN_PTE_SHIFT separately for all 3 configs? > If high bits are used for > something else, then we might produce a garbage PTE on overflow, but that > shouldn't really matter I concluded for folio_pte_batch() purposes, we'd not > detect "belongs to this folio batch" either way. Exactly. > > Maybe it's likely cleaner to also have a custom pte_next_pfn() on ppc, I just > hope that we don't lose any other arbitrary PTE bits by doing the pte_pgprot(). I don't see the need for ppc to implement pte_next_pfn(). pte_pgprot() is not a "proper" arch interface (its only required by the core-mm if the arch implements a certain Kconfig IIRC). For arm64, all bits that are not pfn are pgprot, so there are no bits lost. > > > I guess pte_pfn() implementations should tell us if anything special needs to > happen. >