Re: Barlopass nvdimm as MemoryMode question

[Dan Williams <dan.j.williams@intel.com>]

Jane Chu wrote:
> Add Joao.
> 
> On 3/7/2024 1:05 PM, Dan Williams wrote:
> 
> > Jane Chu wrote:
> >> Hi, Dan and Vishal,
> >>
> >> What kind of NUMAness is visible to the kernel w.r.t. SysRAM region
> >> backed by Barlopass nvdimms configured in MemoryMode by impctl ?
> > As always, the NUMA description, is a property of the platform not the
> > media type / DIMM. The ACPI HMAT desrcibes the details of a
> > memory-side-caches. See "5.2.27.2 Memory Side Cache Overview" in ACPI
> > 6.4.
> 
> Thanks!  So, compare to dax_kmem which assign a numa node to a newly 
> converted pmem/SysRAM region, 

...to be clear, dax_kmem is not creating a new NUMA node, it is just
potentially onlining a proximity domain that was fully described by ACPI
SRAT but offline.

> w.r.t. pmem in MemoryMode, is there any clue that kernel exposes(or
> could expose) to userland about the extra latency such that userland
> may treat these memory regions differently?

Userland should be able to interrogate the memory_side_cache/ property
in NUMA sysfs:

https://docs.kernel.org/admin-guide/mm/numaperf.html?#numa-cache

Otherwise I believe SRAT and SLIT for that node only reflect the
performance of the DDR fronting the PMEM. So if you have a DDR node and
DDR+PMEM cache node, they may look the same from the ACPI SLIT
perspective, but the ACPI HMAT contains the details of the backing
memory. The Linux NUMA performance sysfs interface gets populated by
ACPI HMAT.