From: Tim Chen <tim.c.chen@linux.intel.com>
To: Johannes Weiner <hannes@cmpxchg.org>, linux-mm@kvack.org
Cc: Hao Wang <haowang3@fb.com>, Abhishek Dhanotia <abhishekd@fb.com>,
"Huang, Ying" <ying.huang@intel.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Yang Shi <yang.shi@linux.alibaba.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Adam Manzanares <a.manzanares@samsung.com>,
linux-kernel@vger.kernel.org, kernel-team@fb.com,
Hasan Al Maruf <hasanalmaruf@fb.com>
Subject: Re: [PATCH] mm: mempolicy: N:M interleave policy for tiered memory nodes
Date: Wed, 08 Jun 2022 11:15:27 -0700 [thread overview]
Message-ID: <6096c96086187e51706898e58610fc0148b4ca23.camel@linux.intel.com> (raw)
In-Reply-To: <20220607171949.85796-1-hannes@cmpxchg.org>
On Tue, 2022-06-07 at 13:19 -0400, Johannes Weiner wrote:
>
> /* Do dynamic interleaving for a process */
> static unsigned interleave_nodes(struct mempolicy *policy)
> {
> unsigned next;
> struct task_struct *me = current;
>
> - next = next_node_in(me->il_prev, policy->nodes);
> + if (numa_tier_interleave[0] > 1 || numa_tier_interleave[1] > 1) {
When we have three memory tiers, do we expect an N:M:K policy?
Like interleaving between DDR5, DDR4 and PMEM memory.
Or we expect an N:M policy still by interleaving between two specific tiers?
The other question is whether we will need multiple interleave policies depending
on cgroup?
One policy could be interleave between tier1, tier2, tier3.
Another could be interleave between tier1 and tier2.
In the current implementation we have one global interleave knob
defined by numa_iter_interleave[].
Tim
next prev parent reply other threads:[~2022-06-08 18:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 17:19 Johannes Weiner
2022-06-08 4:19 ` Ying Huang
2022-06-08 14:16 ` Johannes Weiner
2022-06-08 18:15 ` Tim Chen [this message]
2022-06-08 19:14 ` Johannes Weiner
2022-06-08 23:40 ` Tim Chen
2022-06-08 23:44 ` kernel test robot
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