From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Sohil Mehta <sohil.mehta@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Ard Biesheuvel <ardb@kernel.org>,
"Paul E. McKenney" <paulmck@kernel.org>,
Josh Poimboeuf <jpoimboe@kernel.org>,
Xiongwei Song <xiongwei.song@windriver.com>,
Xin Li <xin3.li@intel.com>,
"Mike Rapoport (IBM)" <rppt@kernel.org>,
Brijesh Singh <brijesh.singh@amd.com>,
Michael Roth <michael.roth@amd.com>,
Tony Luck <tony.luck@intel.com>,
Alexey Kardashevskiy <aik@amd.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jonathan Corbet <corbet@lwn.net>, Ingo Molnar <mingo@kernel.org>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Daniel Sneddon <daniel.sneddon@linux.intel.com>,
Kai Huang <kai.huang@intel.com>,
Sandipan Das <sandipan.das@amd.com>,
Breno Leitao <leitao@debian.org>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
Alexei Starovoitov <ast@kernel.org>,
Hou Tao <houtao1@huawei.com>, Juergen Gross <jgross@suse.com>,
Vegard Nossum <vegard.nossum@oracle.com>,
Kees Cook <kees@kernel.org>, Eric Biggers <ebiggers@google.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
"Masami Hiramatsu (Google)" <mhiramat@kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
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Rasmus Villemoes <linux@rasmusvillemoes.dk>,
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Tejun Heo <tj@kernel.org>, Changbin Du <changbin.du@huawei.com>,
Huang Shijie <shijie@os.amperecomputing.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Namhyung Kim <namhyung@kernel.org>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-efi@vger.kernel.org, linux-mm@kvack.org
Subject: Re: [PATCHv8 04/17] x86/cpu: Defer CR pinning setup until after EFI initialization
Date: Wed, 2 Jul 2025 12:47:24 +0300 [thread overview]
Message-ID: <5s25fkpxv6p3ai2iagtgyqhpt3c4cv54q6lgeeebizsseediyy@wl4epcc7i35a> (raw)
In-Reply-To: <080df169-0f47-40ea-b7b3-4d1a35bee151@intel.com>
On Tue, Jul 01, 2025 at 12:03:01PM -0700, Sohil Mehta wrote:
> On 7/1/2025 2:58 AM, Kirill A. Shutemov wrote:
> > From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> >
> > In order to map the EFI runtime services, set_virtual_address_map()
> > needs to be called, which resides in the lower half of the address
> > space. This means that LASS needs to be temporarily disabled around
> > this call. This can only be done before the CR pinning is set up.
> >
> > Move CR pinning setup behind the EFI initialization.
> >
> > Wrapping efi_enter_virtual_mode() into lass_disable/enable_enforcement()
>
> I believe this should be lass_stac()/clac() since we reverted to the
> original naming.
Doh. Will fix.
> > is not enough because AC flag gates data accesses, but not instruction
> > fetch. Clearing the CR4 bit is required.
> >
> > Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> > Suggested-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > ---
> > arch/x86/kernel/cpu/common.c | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> > index 4f430be285de..9918121e0adc 100644
> > --- a/arch/x86/kernel/cpu/common.c
> > +++ b/arch/x86/kernel/cpu/common.c
> > @@ -2081,7 +2081,6 @@ static __init void identify_boot_cpu(void)
> > enable_sep_cpu();
> > #endif
> > cpu_detect_tlb(&boot_cpu_data);
> > - setup_cr_pinning();
> >
> > tsx_init();
> > tdx_init();
> > @@ -2532,10 +2531,14 @@ void __init arch_cpu_finalize_init(void)
> >
> > /*
> > * This needs to follow the FPU initializtion, since EFI depends on it.
> > + *
> > + * EFI twiddles CR4.LASS. Do it before CR pinning.
> > */
> > if (efi_enabled(EFI_RUNTIME_SERVICES))
> > efi_enter_virtual_mode();
> >
> > + setup_cr_pinning();
> > +
>
> Instead of EFI toggling CR4.LASS, why not defer the first LASS
> activation itself?
>
> i.e.
>
> if (efi_enabled(EFI_RUNTIME_SERVICES))
> efi_enter_virtual_mode();
>
> setup_lass();
>
> setup_cr_pinning();
>
>
> This way, we can avoid the following patch (#5) altogether.
That's definitely an option.
The benefit of current approach is that the enforcement is enabled
earlier and cover more boot code, providing marginal protection
improvement.
I also like that related security features (SMEP/SMAP/UMIP/LASS) are
enabled in the same place.
In the end it is a judgement call.
Maintainers, any preference?
--
Kiryl Shutsemau / Kirill A. Shutemov
next prev parent reply other threads:[~2025-07-02 9:47 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20250701095849.2360685-1-kirill.shutemov@linux.intel.com>
[not found] ` <20250701095849.2360685-4-kirill.shutemov@linux.intel.com>
2025-07-01 18:44 ` [PATCHv8 03/17] x86/alternatives: Disable LASS when patching kernel alternatives Sohil Mehta
[not found] ` <20250701095849.2360685-12-kirill.shutemov@linux.intel.com>
2025-07-01 22:51 ` [PATCHv8 11/17] x86/cpu: Set LASS CR4 bit as pinning sensitive Sohil Mehta
[not found] ` <20250701095849.2360685-16-kirill.shutemov@linux.intel.com>
2025-07-01 23:03 ` [PATCHv8 15/17] x86/cpu: Make LAM depend on LASS Sohil Mehta
[not found] ` <20250701095849.2360685-5-kirill.shutemov@linux.intel.com>
2025-07-01 19:03 ` [PATCHv8 04/17] x86/cpu: Defer CR pinning setup until after EFI initialization Sohil Mehta
2025-07-02 9:47 ` Kirill A. Shutemov [this message]
2025-07-01 23:10 ` Dave Hansen
2025-07-02 10:05 ` Kirill A. Shutemov
2025-07-04 12:23 ` Kirill A. Shutemov
[not found] ` <20250701095849.2360685-18-kirill.shutemov@linux.intel.com>
2025-07-01 23:13 ` [PATCHv8 17/17] x86: Re-enable Linear Address Masking Sohil Mehta
[not found] ` <20250701095849.2360685-13-kirill.shutemov@linux.intel.com>
2025-07-02 0:36 ` [PATCHv8 12/17] x86/traps: Communicate a LASS violation in #GP message Sohil Mehta
2025-07-02 10:10 ` Kirill A. Shutemov
[not found] ` <20250701095849.2360685-14-kirill.shutemov@linux.intel.com>
2025-07-02 0:54 ` [PATCHv8 13/17] x86/traps: Generalize #GP address decode and hint code Sohil Mehta
[not found] ` <20250701095849.2360685-15-kirill.shutemov@linux.intel.com>
2025-07-02 1:35 ` [PATCHv8 14/17] x86/traps: Handle LASS thrown #SS Sohil Mehta
2025-07-02 2:00 ` H. Peter Anvin
2025-07-02 2:06 ` H. Peter Anvin
2025-07-02 10:17 ` Kirill A. Shutemov
2025-07-02 14:37 ` H. Peter Anvin
2025-07-02 14:47 ` Kirill A. Shutemov
2025-07-02 17:10 ` H. Peter Anvin
2025-07-02 23:42 ` Andrew Cooper
2025-07-03 0:44 ` H. Peter Anvin
2025-07-06 9:22 ` David Laight
2025-07-06 15:07 ` H. Peter Anvin
2025-07-02 13:27 ` Kirill A. Shutemov
2025-07-02 17:56 ` Sohil Mehta
2025-07-03 10:40 ` Kirill A. Shutemov
2025-07-02 20:05 ` Sohil Mehta
2025-07-03 11:31 ` Kirill A. Shutemov
2025-07-03 20:12 ` Sohil Mehta
2025-07-04 9:23 ` Kirill A. Shutemov
[not found] ` <20250701095849.2360685-3-kirill.shutemov@linux.intel.com>
2025-07-03 8:44 ` [PATCHv8 02/17] x86/asm: Introduce inline memcpy and memset David Laight
2025-07-03 10:39 ` Kirill A. Shutemov
2025-07-03 12:15 ` David Laight
2025-07-03 13:33 ` Vegard Nossum
2025-07-03 16:52 ` David Laight
2025-07-03 14:10 ` Kirill A. Shutemov
2025-07-03 17:02 ` David Laight
2025-07-03 17:13 ` Dave Hansen
2025-07-04 9:04 ` Kirill A. Shutemov
2025-07-06 9:13 ` David Laight
2025-07-07 8:02 ` Kirill A. Shutemov
2025-07-07 9:33 ` David Laight
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