From: Dave Hansen <dave.hansen@intel.com>
To: Peter Xu <peterx@redhat.com>
Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, x86@kernel.org,
Borislav Petkov <bp@alien8.de>, Dave Jiang <dave.jiang@intel.com>,
"Kirill A . Shutemov" <kirill@shutemov.name>,
Ingo Molnar <mingo@redhat.com>,
Oscar Salvador <osalvador@suse.de>,
Matthew Wilcox <willy@infradead.org>,
Vlastimil Babka <vbabka@suse.cz>,
Dan Williams <dan.j.williams@intel.com>,
Andrew Morton <akpm@linux-foundation.org>,
Hugh Dickins <hughd@google.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Dave Hansen <dave.hansen@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
linuxppc-dev@lists.ozlabs.org,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Rik van Riel <riel@surriel.com>,
Mel Gorman <mgorman@techsingularity.net>,
"Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>,
Nicholas Piggin <npiggin@gmail.com>,
Huang Ying <ying.huang@intel.com>,
"Edgecombe, Rick P" <rick.p.edgecombe@intel.com>
Subject: Re: [PATCH 6/7] mm/x86: Add missing pud helpers
Date: Fri, 21 Jun 2024 09:11:56 -0700 [thread overview]
Message-ID: <5daa82f5-b5ea-42d7-a074-122734ad99db@intel.com> (raw)
In-Reply-To: <ZnWgG7WmZWS-xWJU@x1n>
On 6/21/24 08:45, Peter Xu wrote:
> On Fri, Jun 21, 2024 at 07:51:26AM -0700, Dave Hansen wrote:
...
>> But, still, what if you take a Dirty=1,Write=1 pud and pud_modify() it
>> to make it Dirty=1,Write=0? What prevents that from being
>> misinterpreted by the hardware as being a valid 1G shadow stack mapping?
>
> Thanks for pointing that out. I think I was thinking it will only take
> effect on VM_SHADOW_STACK first, so it's not?
>
> I was indeed trying to find more information on shadow stack at that time
> but I can't find as much on the pgtable implications, on e.g. whether "D=1
> + W=0" globally will be recognized as shadow stack. At least on SDM March
> 2024 version Vol3 Chap4 pgtable entries still don't explain these details,
> or maybe I missed it. Please let me know if there's suggestion on what I
> can read before I post a v2.
It's in the "Determination of Access Rights" section.
A linear address is a shadow-stack address if the following are
true of the translation of the linear address: (1) the R/W flag
(bit 1) is 0 and the dirty flag (bit 6) is 1 in the paging-
structure entry that maps the page containing the linear
address; and (2) the R/W flag is 1 in every other paging-
structure entry controlling the translation of the linear
address.
> So if it's globally taking effect, indeed we'll need to handle them in PUDs
> too.
>
> Asides, not sure whether it's off-topic to ask here, but... why shadow
> stack doesn't reuse an old soft-bit to explicitly mark "this is shadow
> stack ptes" when designing the spec? Now it consumed bit 58 anyway for
> caching dirty. IIUC we can avoid all these "move back and forth" issue on
> dirty bit if so.
The design accommodates "other" OSes that are using all the software
bits for other things.
For Linux, you're right, we just ended up consuming a software bit
_anyway_ so we got all the complexity of the goofy permissions *AND*
lost a bit in the end. Lose, lose.
>>> /*
>>> * mprotect needs to preserve PAT and encryption bits when updating
>>> * vm_page_prot
>>> @@ -1377,10 +1398,25 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
>>> }
>>> #endif
>>>
>>> +static inline pud_t pudp_establish(struct vm_area_struct *vma,
>>> + unsigned long address, pud_t *pudp, pud_t pud)
>>> +{
>>> + if (IS_ENABLED(CONFIG_SMP)) {
>>> + return xchg(pudp, pud);
>>> + } else {
>>> + pud_t old = *pudp;
>>> + WRITE_ONCE(*pudp, pud);
>>> + return old;
>>> + }
>>> +}
>>
>> Why is there no:
>>
>> page_table_check_pud_set(vma->vm_mm, pudp, pud);
>>
>> ? Sure, it doesn't _do_ anything today. But the PMD code has it today.
>> So leaving it out creates a divergence that honestly can only serve to
>> bite us in the future and will create a head-scratching delta for anyone
>> that is comparing PUD and PMD implementations in the future.
>
> Good question, I really don't remember why I didn't have that, since I
> should have referenced the pmd helper. I'll add them and see whether I'll
> hit something otherwise.
>
> Thanks for the review.
One big thing I did in this review was make sure that the PMD and PUD
helpers were doing the same thing. Would you mind circling back and
double-checking the same before you repost this?
next prev parent reply other threads:[~2024-06-21 16:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-21 14:24 [PATCH 0/7] mm/mprotect: Fix dax puds Peter Xu
2024-06-21 14:24 ` [PATCH 1/7] mm/dax: Dump start address in fault handler Peter Xu
2024-06-21 14:24 ` [PATCH 2/7] mm/mprotect: Remove NUMA_HUGE_PTE_UPDATES Peter Xu
2024-06-21 14:25 ` [PATCH 3/7] mm/mprotect: Push mmu notifier to PUDs Peter Xu
2024-06-21 14:25 ` [PATCH 4/7] mm/powerpc: Add missing pud helpers Peter Xu
2024-06-21 15:01 ` Peter Xu
2024-06-21 14:25 ` [PATCH 5/7] mm/x86: Make pud_leaf() only cares about PSE bit Peter Xu
2024-06-21 14:32 ` Dave Hansen
2024-06-21 14:25 ` [PATCH 6/7] mm/x86: Add missing pud helpers Peter Xu
2024-06-21 14:51 ` Dave Hansen
2024-06-21 15:45 ` Peter Xu
2024-06-21 16:11 ` Dave Hansen [this message]
2024-06-23 15:42 ` Peter Xu
2024-06-21 19:36 ` Edgecombe, Rick P
2024-06-21 20:27 ` Peter Xu
2024-06-21 22:06 ` Edgecombe, Rick P
2024-06-21 14:25 ` [PATCH 7/7] mm/mprotect: fix dax pud handlings Peter Xu
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