From: Dave Hansen <dave.hansen@intel.com>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: Linux-MM <linux-mm@kvack.org>,
LKML <linux-kernel@vger.kernel.org>,
Andrea Arcangeli <aarcange@redhat.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Andrew Morton <akpm@linux-foundation.org>,
Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Xu <peterx@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>,
Will Deacon <will@kernel.org>, Yu Zhao <yuzhao@google.com>,
Nick Piggin <npiggin@gmail.com>,
x86@kernel.org
Subject: Re: [PATCH v2 3/5] x86/mm: check exec permissions on fault
Date: Mon, 25 Oct 2021 11:00:19 -0700 [thread overview]
Message-ID: <5c06a3d7-bed8-4b02-6509-a7f6c138ee96@intel.com> (raw)
In-Reply-To: <C30DF7E3-98B9-4985-B83B-E4FCD86A1663@gmail.com>
On 10/25/21 10:51 AM, Nadav Amit wrote:
>> On Oct 25, 2021, at 10:45 AM, Dave Hansen <dave.hansen@intel.com> wrote:
>> On 10/25/21 9:19 AM, Nadav Amit wrote:
>>> That was my first version, but I was concerned that perhaps there is
>>> some strange scenario in which both X86_PF_WRITE and X86_PF_INSN can
>>> be set. That is the reason that Peter asked you whether this is
>>> something that might happen.
>>>
>>> If you confirm they cannot be both set, I would the version you just
>>> mentioned.
>> I'm pretty sure they can't be set together on any sane hardware. A
>> bonkers hypervisor or CPU could do it of course, but they'd be crazy.
>>
>> BTW, feel free to add a WARN_ON_ONCE() if WRITE and INSN are both set.
>> That would be a nice place to talk about the assumption.
>>
> I can do that. But be aware that if the assumption is broken, it might
> lead to the application getting stuck in an infinite loop of
> page-faults instead of receiving SIGSEGV.
If we have a bonkers hypervisor/CPU, I'm OK with a process that hangs
like that, especially if we can ^C it and see its stream of page faults
with tracing or whatever.
Couldn't we just also do:
if ((code & (X86_PF_WRITE|X86_PF_INSN) ==
(X86_PF_WRITE|X86_PF_INSN)) {
WARN_ON_ONCE(1);
return 1;
}
That should give you the WARN_ON_ONCE() and also return an affirmative
access_error(), resulting in a SIGSEGV.
(I'm not sure I like the indentation as I wrote it here... just do what
looks best in the code)
next prev parent reply other threads:[~2021-10-25 18:21 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-21 12:21 [PATCH v2 0/5] mm/mprotect: avoid unnecessary TLB flushes Nadav Amit
2021-10-21 12:21 ` [PATCH v2 1/5] x86: Detection of Knights Landing A/D leak Nadav Amit
2021-10-26 15:54 ` Dave Hansen
2021-10-26 15:57 ` Nadav Amit
2021-10-21 12:21 ` [PATCH v2 2/5] mm: avoid unnecessary flush on change_huge_pmd() Nadav Amit
2021-10-25 10:52 ` Peter Zijlstra
2021-10-25 16:29 ` Nadav Amit
2021-10-26 16:06 ` Dave Hansen
2021-10-26 16:47 ` Nadav Amit
2021-10-26 16:53 ` Nadav Amit
2021-10-26 17:44 ` Nadav Amit
2021-10-26 18:44 ` Dave Hansen
2021-10-26 19:06 ` Nadav Amit
2021-10-26 19:40 ` Dave Hansen
2021-10-26 20:07 ` Nadav Amit
2021-10-26 20:47 ` Dave Hansen
2021-10-21 12:21 ` [PATCH v2 3/5] x86/mm: check exec permissions on fault Nadav Amit
2021-10-25 10:59 ` Peter Zijlstra
2021-10-25 11:13 ` Andrew Cooper
2021-10-25 14:23 ` Dave Hansen
2021-10-25 14:20 ` Dave Hansen
2021-10-25 16:19 ` Nadav Amit
2021-10-25 17:45 ` Dave Hansen
2021-10-25 17:51 ` Nadav Amit
2021-10-25 18:00 ` Dave Hansen [this message]
2021-10-21 12:21 ` [PATCH v2 4/5] mm/mprotect: use mmu_gather Nadav Amit
2021-10-21 12:21 ` [PATCH v2 5/5] mm/mprotect: do not flush on permission promotion Nadav Amit
2021-10-25 11:12 ` Peter Zijlstra
2021-10-25 16:27 ` Nadav Amit
2021-10-22 3:04 ` [PATCH v2 0/5] mm/mprotect: avoid unnecessary TLB flushes Andrew Morton
2021-10-22 21:58 ` Nadav Amit
2021-10-26 16:09 ` Dave Hansen
2021-10-25 10:50 ` Peter Zijlstra
2021-10-25 16:42 ` Nadav Amit
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