From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f199.google.com (mail-pf0-f199.google.com [209.85.192.199]) by kanga.kvack.org (Postfix) with ESMTP id BFC7A6B0005 for ; Sun, 3 Jul 2016 13:10:45 -0400 (EDT) Received: by mail-pf0-f199.google.com with SMTP id a69so347942873pfa.1 for ; Sun, 03 Jul 2016 10:10:45 -0700 (PDT) Received: from blackbird.sr71.net (www.sr71.net. [198.145.64.142]) by mx.google.com with ESMTP id b2si4679711pav.216.2016.07.03.10.10.42 for ; Sun, 03 Jul 2016 10:10:42 -0700 (PDT) Subject: Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs References: <20160701001209.7DA24D1C@viggo.jf.intel.com> <20160701001218.3D316260@viggo.jf.intel.com> From: Dave Hansen Message-ID: <5779470F.8020205@sr71.net> Date: Sun, 3 Jul 2016 10:10:39 -0700 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: owner-linux-mm@kvack.org List-ID: To: Brian Gerst , Linus Torvalds Cc: Linux Kernel Mailing List , the arch/x86 maintainers , linux-mm , Andrew Morton , Borislav Petkov , Andi Kleen , Michal Hocko , Dave Hansen On 06/30/2016 08:06 PM, Brian Gerst wrote: >> > It's not like anybody will ever care about 32-bit page tables on >> > Knights Landing anyway. > Could this affect a 32-bit guest VM? This isn't about 32-bit *mode*. It's about using the the 32-bit 2-level _paging_ mode that supports only 4GB virtual and 4GB physical addresses. That mode also doesn't support the No-eXecute (NX) bit, which basically everyone needs today for its security benefits. Even the little Quark CPU supports PAE (64-bit page tables). -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org