From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by kanga.kvack.org (Postfix) with ESMTP id 1EDF36B0038 for ; Thu, 10 Sep 2015 03:22:45 -0400 (EDT) Received: by wicfx3 with SMTP id fx3so11864326wic.0 for ; Thu, 10 Sep 2015 00:22:44 -0700 (PDT) Received: from mx2.suse.de (mx2.suse.de. [195.135.220.15]) by mx.google.com with ESMTPS id n5si5738616wia.1.2015.09.10.00.22.43 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 10 Sep 2015 00:22:44 -0700 (PDT) Subject: Re: Store Buffers (was Re: Is it OK to pass non-acquired objects to kfree?) References: <20150909184415.GJ4029@linux.vnet.ibm.com> <20150909203642.GO4029@linux.vnet.ibm.com> From: Vlastimil Babka Message-ID: <55F12FC1.2070801@suse.cz> Date: Thu, 10 Sep 2015 09:22:41 +0200 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: owner-linux-mm@kvack.org List-ID: To: Christoph Lameter , "Paul E. McKenney" Cc: Dmitry Vyukov , Pekka Enberg , David Rientjes , Joonsoo Kim , Andrew Morton , "linux-mm@kvack.org" , Andrey Konovalov , Alexander Potapenko On 09/10/2015 01:23 AM, Christoph Lameter wrote: > On Wed, 9 Sep 2015, Paul E. McKenney wrote: > >> > > > A processor that can randomly defer writes to cachelines in the face of >> > > > other processors owning cachelines exclusively does not seem sane to me. >> > > > In fact its no longer exclusive. >> > > >> > > Welcome to the wonderful world of store buffers, which are present even >> > > on strongly ordered systems such as x86 and the mainframe. >> > >> > Store buffers hold complete cachelines that have been written to by a >> > processor. >> >> In many cases, partial cachelines. If the cacheline is not available >> locally, the processor cannot know the contents of the rest of the cache >> line, only the contents of the portion that it recently stored into. > > For a partial cacheline it would have to read the rest of the cacheline > before updating. And I would expect the processor to have exclusive access > to the cacheline that is held in a store buffer. If not then there is > trouble afoot. IIRC that (or something similar with same guarantees) basically happens on x86 when you use the LOCK prefix, i.e. for atomic inc etc. Doing that always would destroy performance. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org