From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63674C3DA6E for ; Wed, 20 Dec 2023 12:55:11 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id CF0E36B0078; Wed, 20 Dec 2023 07:55:10 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id C9F4E6B007D; Wed, 20 Dec 2023 07:55:10 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id B188A6B0080; Wed, 20 Dec 2023 07:55:10 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 9C4F86B0078 for ; Wed, 20 Dec 2023 07:55:10 -0500 (EST) Received: from smtpin11.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay01.hostedemail.com (Postfix) with ESMTP id 5EDCD1C103B for ; Wed, 20 Dec 2023 12:55:10 +0000 (UTC) X-FDA: 81587191980.11.E9C3B20 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by imf26.hostedemail.com (Postfix) with ESMTP id 1AFF814000C for ; Wed, 20 Dec 2023 12:55:05 +0000 (UTC) Authentication-Results: imf26.hostedemail.com; dkim=pass header.d=redhat.com header.s=mimecast20190719 header.b=CMD19GKX; dmarc=pass (policy=none) header.from=redhat.com; spf=pass (imf26.hostedemail.com: domain of david@redhat.com designates 170.10.133.124 as permitted sender) smtp.mailfrom=david@redhat.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1703076906; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=5EzlJsi0dZtBxnnHimhpFGwSMfH4YSJP5ttKUoO8KF8=; b=dypUuLoVB9YYIcGHCCiwKFekPLCy+7njQDB+FSTBO2CAL27LaF/x6RLeL2gRQmRCEUKW4P Q4FCbnVlDBVVHy/aRa309dS1Sew4MfeXXxdVkKX9JbE+p2Zhd0mSz/3cpE0pRmDf4KwQK+ +KehuXo2co78HOpYxYoQV2vKLj4P1Ko= ARC-Authentication-Results: i=1; imf26.hostedemail.com; dkim=pass header.d=redhat.com header.s=mimecast20190719 header.b=CMD19GKX; dmarc=pass (policy=none) header.from=redhat.com; spf=pass (imf26.hostedemail.com: domain of david@redhat.com designates 170.10.133.124 as permitted sender) smtp.mailfrom=david@redhat.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1703076906; a=rsa-sha256; cv=none; b=pqREYTHzI44yzq8fArwqZYQ2or7wea/pwlXg23nqyN4r+e99nr9ajQ+PtQbGQEgekop5No SkzEMX7Yt8eCwZYOLgQGI3I2fx0omeltommeGJBS5xNXoGay4S+71wUqGQE77v3xp3ukO7 k4Ssc6Zk+FJ+KOGeI7vwUJCbG7aMzj0= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1703076905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:autocrypt:autocrypt; bh=5EzlJsi0dZtBxnnHimhpFGwSMfH4YSJP5ttKUoO8KF8=; b=CMD19GKXAUdxp1q0hpJf6z+78AiIu5gxmcU1gsUxcXj8/QVf/zljn7qI3CD0KLwEXnARav IIpzpegXSj2psNyKFA8fw+ZXaHJP62o1stDXzkd1tJcR5HjJrYIOG5lRX+7wm9hnuQq0q7 BA8u2ws6s7lkGYx2yHfv9nQWltA1UoA= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-166-HLz6w58IPxCRwitLAV3E3g-1; Wed, 20 Dec 2023 07:55:04 -0500 X-MC-Unique: HLz6w58IPxCRwitLAV3E3g-1 Received: by mail-wr1-f72.google.com with SMTP id ffacd0b85a97d-33347dc610dso4082233f8f.1 for ; Wed, 20 Dec 2023 04:55:03 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703076903; x=1703681703; h=content-transfer-encoding:in-reply-to:organization:autocrypt:from :references:cc:to:content-language:subject:user-agent:mime-version :date:message-id:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=5EzlJsi0dZtBxnnHimhpFGwSMfH4YSJP5ttKUoO8KF8=; b=ttndS217jCQ6vvYBBKERMWAftQJphsdjU2zcANNpA1btyf1W/2kqX/0tAqV5OBymms E6mUBHsW+ION1aIpzGM8LwEXbU6H6QQ6/5/EcF40z8LX2YQtQ1vx1CRmiMvFrtZPw/qF AAhzVqVFP+MHdXXmlIm/vwQdMzO5j0MR5ux6+Hit2I3Y044+93lSvDqWAgQmktELxJPo +W+1oGnX1ZHVKIR+JKAXS1FRK2rIZiyTiVlTWlrfG7cwWw2996RaUr4VzOrT1d/28mlR JpkSar0+0dQh3OL86V38mG1xMQd+XnQB7KgEqRo6+xUYk+v3srSCOeG34pU5Ll/K/g5A mdGA== X-Gm-Message-State: AOJu0Yz+o/jEUeBoyzwDOlp+CPo7Bz5RnHAiVHU/qTT4Ulc++B3eJIJO 5Y/hIjbCnt9jghuSabNi43PyvHj7Zh/1xYdJfuIpKdoh54+EVDKOeEjk2NFOOhQUsBYI+9Ghuji cjbjjDY2nrCl7V8ZUIeA= X-Received: by 2002:a05:600c:1c0f:b0:40b:5e21:dd16 with SMTP id j15-20020a05600c1c0f00b0040b5e21dd16mr11714822wms.68.1703076902548; Wed, 20 Dec 2023 04:55:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IGD4+GpjaA6rRGnqlzfD4MApaCEn7+/BusygtI57+L0ws12JNDh8iSqyVJ+MNpEpW5QJ9ufmg== X-Received: by 2002:a05:600c:1c0f:b0:40b:5e21:dd16 with SMTP id j15-20020a05600c1c0f00b0040b5e21dd16mr11714792wms.68.1703076902019; Wed, 20 Dec 2023 04:55:02 -0800 (PST) Received: from ?IPV6:2003:cb:c73b:eb00:8e25:6953:927:1802? (p200300cbc73beb008e25695309271802.dip0.t-ipconnect.de. [2003:cb:c73b:eb00:8e25:6953:927:1802]) by smtp.gmail.com with ESMTPSA id h21-20020a05600c351500b0040d378623b1sm2037929wmq.22.2023.12.20.04.55.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 Dec 2023 04:55:01 -0800 (PST) Message-ID: <54d645de-d031-4efc-a1ba-042f709cd549@redhat.com> Date: Wed, 20 Dec 2023 13:54:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/16] mm: Batch-copy PTE ranges during fork() To: Ryan Roberts , Catalin Marinas , Will Deacon , Ard Biesheuvel , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Andrew Morton , Anshuman Khandual , Matthew Wilcox , Yu Zhao , Mark Rutland , Kefeng Wang , John Hubbard , Zi Yan , Barry Song <21cnbao@gmail.com>, Alistair Popple , Yang Shi Cc: linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org References: <20231218105100.172635-1-ryan.roberts@arm.com> <20231218105100.172635-3-ryan.roberts@arm.com> <0bef5423-6eea-446b-8854-980e9c23a948@redhat.com> <7c0236ad-01f3-437f-8b04-125d69e90dc0@redhat.com> <9a58b1a2-2c13-4fa0-8ffa-2b3d9655f1b6@arm.com> <28968568-f920-47ac-b6fd-87528ffd8f77@redhat.com> <10b0b562-c1c0-4a66-9aeb-a6bff5c218f6@arm.com> <8f8023cb-3c31-4ead-a9e6-03a10e9490c6@redhat.com> <699cb1db-51eb-460e-9ceb-1ce08ca03050@redhat.com> <2a8c5b6c-f5ae-43b2-99aa-6d10e79b76e1@redhat.com> <3194b8a5-3f72-4d9e-a267-fbdad32ad864@redhat.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZgEEwEIAEICGwMGCwkIBwMCBhUIAgkKCwQW AgMBAh4BAheAAhkBFiEEG9nKrXNcTDpGDfzKTd4Q9wD/g1oFAl8Ox4kFCRKpKXgACgkQTd4Q 9wD/g1oHcA//a6Tj7SBNjFNM1iNhWUo1lxAja0lpSodSnB2g4FCZ4R61SBR4l/psBL73xktp rDHrx4aSpwkRP6Epu6mLvhlfjmkRG4OynJ5HG1gfv7RJJfnUdUM1z5kdS8JBrOhMJS2c/gPf wv1TGRq2XdMPnfY2o0CxRqpcLkx4vBODvJGl2mQyJF/gPepdDfcT8/PY9BJ7FL6Hrq1gnAo4 3Iv9qV0JiT2wmZciNyYQhmA1V6dyTRiQ4YAc31zOo2IM+xisPzeSHgw3ONY/XhYvfZ9r7W1l pNQdc2G+o4Di9NPFHQQhDw3YTRR1opJaTlRDzxYxzU6ZnUUBghxt9cwUWTpfCktkMZiPSDGd KgQBjnweV2jw9UOTxjb4LXqDjmSNkjDdQUOU69jGMUXgihvo4zhYcMX8F5gWdRtMR7DzW/YE BgVcyxNkMIXoY1aYj6npHYiNQesQlqjU6azjbH70/SXKM5tNRplgW8TNprMDuntdvV9wNkFs 9TyM02V5aWxFfI42+aivc4KEw69SE9KXwC7FSf5wXzuTot97N9Phj/Z3+jx443jo2NR34XgF 89cct7wJMjOF7bBefo0fPPZQuIma0Zym71cP61OP/i11ahNye6HGKfxGCOcs5wW9kRQEk8P9 M/k2wt3mt/fCQnuP/mWutNPt95w9wSsUyATLmtNrwccz63XOwU0EVcufkQEQAOfX3n0g0fZz Bgm/S2zF/kxQKCEKP8ID+Vz8sy2GpDvveBq4H2Y34XWsT1zLJdvqPI4af4ZSMxuerWjXbVWb T6d4odQIG0fKx4F8NccDqbgHeZRNajXeeJ3R7gAzvWvQNLz4piHrO/B4tf8svmRBL0ZB5P5A 2uhdwLU3NZuK22zpNn4is87BPWF8HhY0L5fafgDMOqnf4guJVJPYNPhUFzXUbPqOKOkL8ojk CXxkOFHAbjstSK5Ca3fKquY3rdX3DNo+EL7FvAiw1mUtS+5GeYE+RMnDCsVFm/C7kY8c2d0G NWkB9pJM5+mnIoFNxy7YBcldYATVeOHoY4LyaUWNnAvFYWp08dHWfZo9WCiJMuTfgtH9tc75 7QanMVdPt6fDK8UUXIBLQ2TWr/sQKE9xtFuEmoQGlE1l6bGaDnnMLcYu+Asp3kDT0w4zYGsx 5r6XQVRH4+5N6eHZiaeYtFOujp5n+pjBaQK7wUUjDilPQ5QMzIuCL4YjVoylWiBNknvQWBXS lQCWmavOT9sttGQXdPCC5ynI+1ymZC1ORZKANLnRAb0NH/UCzcsstw2TAkFnMEbo9Zu9w7Kv AxBQXWeXhJI9XQssfrf4Gusdqx8nPEpfOqCtbbwJMATbHyqLt7/oz/5deGuwxgb65pWIzufa N7eop7uh+6bezi+rugUI+w6DABEBAAHCwXwEGAEIACYCGwwWIQQb2cqtc1xMOkYN/MpN3hD3 AP+DWgUCXw7HsgUJEqkpoQAKCRBN3hD3AP+DWrrpD/4qS3dyVRxDcDHIlmguXjC1Q5tZTwNB boaBTPHSy/Nksu0eY7x6HfQJ3xajVH32Ms6t1trDQmPx2iP5+7iDsb7OKAb5eOS8h+BEBDeq 3ecsQDv0fFJOA9ag5O3LLNk+3x3q7e0uo06XMaY7UHS341ozXUUI7wC7iKfoUTv03iO9El5f XpNMx/YrIMduZ2+nd9Di7o5+KIwlb2mAB9sTNHdMrXesX8eBL6T9b+MZJk+mZuPxKNVfEQMQ a5SxUEADIPQTPNvBewdeI80yeOCrN+Zzwy/Mrx9EPeu59Y5vSJOx/z6OUImD/GhX7Xvkt3kq Er5KTrJz3++B6SH9pum9PuoE/k+nntJkNMmQpR4MCBaV/J9gIOPGodDKnjdng+mXliF3Ptu6 3oxc2RCyGzTlxyMwuc2U5Q7KtUNTdDe8T0uE+9b8BLMVQDDfJjqY0VVqSUwImzTDLX9S4g/8 kC4HRcclk8hpyhY2jKGluZO0awwTIMgVEzmTyBphDg/Gx7dZU1Xf8HFuE+UZ5UDHDTnwgv7E th6RC9+WrhDNspZ9fJjKWRbveQgUFCpe1sa77LAw+XFrKmBHXp9ZVIe90RMe2tRL06BGiRZr jPrnvUsUUsjRoRNJjKKA/REq+sAnhkNPPZ/NNMjaZ5b8Tovi8C0tmxiCHaQYqj7G2rgnT0kt WNyWQQ== Organization: Red Hat In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 1AFF814000C X-Rspam-User: X-Rspamd-Server: rspam04 X-Stat-Signature: zydx5keyzigsi3qtmazp3xcmgb14ciho X-HE-Tag: 1703076905-123093 X-HE-Meta: U2FsdGVkX1+j58FnxeHSzttFGW7y6K6sEMMAnmBkbTuSED6e8VG7xgyOEYAYh/iHGIoXICqvjg5egq/5Br4nkza0Uo6mUKRJra3z8qrZH+ziVwFYisQjHGSoC+SX+9LMGKQg4Rcwrliu9jju6FEyzSZIVAZsvKp0e1s4k9tfBeJlo8t1/+Dqel2LM+cYI3HBTdqR5ceonvHqA/nXwAXiQbuS+oc92SIQSIU0t8pCKVGrZi9jAdsfOtEmXfb56Dws1kZzaFc6q9+xhXKevFH2Fuy8IphD/Y6bGUQGatcbvSSOVSrQFlwa0w6+zAHdyeLTIhpVpxBwU2vrHqUdAOeDHFuQp0UdSOUidvLoK8Reusl3cTb0WTiWAme+RkpdWT+4f7X6c53YzrzfkpqE1Z4ZeILzjxEJMmYEABNTx7HsLyerNs5wNn01xa2OeP4L/zWeF8iv4woKpUg2IAtxVKqkl9oMWS4FaHnynGlk/RxQ6lwPcB/jfxlPnUM11I22V1by4LNPD0AUBUawqiiof9CDjclu6vACiye6SjGBen7rBavhhBNIs9zmL/EeOMS7sqLtZAMNROMqNPzeecToq5ERG4YlFamkZsPdkaRSqy6ekdsU56PItPJstxg49/Hr0OaK21llcrxycynEPt73jJNACdvIHsUiNLMIAHTs1Y9BMqp7fRlW1VuFsjW2K0rwZkPNa2ZgF4VNOmirEag/rJyAp89+O306p/eEuXwAJzfiT/fY19Jq/gGUu/zpzayN4mWmMVNWIukHaJSlvGFEkMH8m5mBZ2O70pqAapIU8Nsyo5vivwOBMteRl4cP+C3/MmUb1YVkAUzLNUEKOhYiJ4IXnE1G3IF6QnTZTwMRVneEoP9mHiz/0mfOJzGcrD+l3iOdKmJm5eHtgPuutH/615euq5jMNjwfDMhBebzQ/c3GRpl19bn2af0a/L70XScBo5HB4buLx8mjwCy7IBORbe8 uxdZ34zG Q9U/6wkAR59n/na4b0MaMlfDfuc2tD/9rzgDn4WvG6zrJ3L67lBsKhSm4tHbjHA9SRgJ+TA4JKNVPRyOixUd6qdMoE5ATrxYKXn0TYIugUtQ/T8hv2NmhoAR+8+JoGjjAlzkJj/r6+bOU2XUF6/5T1eblqwF6K+zpu6z35OHu0No3g/fvcyJ7BeFVFiHuwNTT9eq9X8X3Jtt2euHzT+8ACJOpWAEZsIoVlkw34WPhacSL3EyZujRsKk+uPO0RRw+YQ9N/sBEF3phzGjbF62Qh4X3kwaFpzFHq8kbzctqgKFEVNAwF7IcXC2ztZNiVNxYdVZ2aZZTvjlNUh+gOBD32oXj6NKhzZXfJPjLnhUkMezqHzrUrD+AoheOgsu2d+Gp0rieG0Xzuvxx7QjRqGLFxvZwYKIrVJRS89zkxN+ndXyAc2nMZs2A1qKWYPEjEZ5CEvfF/5TZ8tZ4fNbMCe0IxoWB4sA1rL3SfzHk7BPwZZQPlKvKuz6hzma4Rv2VHsmoe3M4JSrC9Z2y2Au5tlG5eyKQQhhPyedcco5T8LMQykeYtpoE81IG/H/Dv+t3BLE3O6anL X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 20.12.23 13:04, Ryan Roberts wrote: > On 20/12/2023 11:58, David Hildenbrand wrote: >> On 20.12.23 12:51, Ryan Roberts wrote: >>> On 20/12/2023 11:36, David Hildenbrand wrote: >>>> On 20.12.23 12:28, Ryan Roberts wrote: >>>>> On 20/12/2023 10:56, David Hildenbrand wrote: >>>>>> On 20.12.23 11:41, Ryan Roberts wrote: >>>>>>> On 20/12/2023 10:16, David Hildenbrand wrote: >>>>>>>> On 20.12.23 11:11, Ryan Roberts wrote: >>>>>>>>> On 20/12/2023 09:54, David Hildenbrand wrote: >>>>>>>>>> On 20.12.23 10:51, Ryan Roberts wrote: >>>>>>>>>>> On 20/12/2023 09:17, David Hildenbrand wrote: >>>>>>>>>>>> On 19.12.23 18:42, Ryan Roberts wrote: >>>>>>>>>>>>> On 19/12/2023 17:22, David Hildenbrand wrote: >>>>>>>>>>>>>> On 19.12.23 09:30, Ryan Roberts wrote: >>>>>>>>>>>>>>> On 18/12/2023 17:47, David Hildenbrand wrote: >>>>>>>>>>>>>>>> On 18.12.23 11:50, Ryan Roberts wrote: >>>>>>>>>>>>>>>>> Convert copy_pte_range() to copy a batch of ptes in one go. A given >>>>>>>>>>>>>>>>> batch is determined by the architecture with the new helper, >>>>>>>>>>>>>>>>> pte_batch_remaining(), and maps a physically contiguous block of >>>>>>>>>>>>>>>>> memory, >>>>>>>>>>>>>>>>> all belonging to the same folio. A pte batch is then >>>>>>>>>>>>>>>>> write-protected in >>>>>>>>>>>>>>>>> one go in the parent using the new helper, ptep_set_wrprotects() >>>>>>>>>>>>>>>>> and is >>>>>>>>>>>>>>>>> set in one go in the child using the new helper, set_ptes_full(). >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> The primary motivation for this change is to reduce the number >>>>>>>>>>>>>>>>> of tlb >>>>>>>>>>>>>>>>> maintenance operations that the arm64 backend has to perform during >>>>>>>>>>>>>>>>> fork, as it is about to add transparent support for the "contiguous >>>>>>>>>>>>>>>>> bit" >>>>>>>>>>>>>>>>> in its ptes. By write-protecting the parent using the new >>>>>>>>>>>>>>>>> ptep_set_wrprotects() (note the 's' at the end) function, the >>>>>>>>>>>>>>>>> backend >>>>>>>>>>>>>>>>> can avoid having to unfold contig ranges of PTEs, which is >>>>>>>>>>>>>>>>> expensive, >>>>>>>>>>>>>>>>> when all ptes in the range are being write-protected. Similarly, by >>>>>>>>>>>>>>>>> using set_ptes_full() rather than set_pte_at() to set up ptes in >>>>>>>>>>>>>>>>> the >>>>>>>>>>>>>>>>> child, the backend does not need to fold a contiguous range once >>>>>>>>>>>>>>>>> they >>>>>>>>>>>>>>>>> are all populated - they can be initially populated as a contiguous >>>>>>>>>>>>>>>>> range in the first place. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> This code is very performance sensitive, and a significant >>>>>>>>>>>>>>>>> amount of >>>>>>>>>>>>>>>>> effort has been put into not regressing performance for the order-0 >>>>>>>>>>>>>>>>> folio case. By default, pte_batch_remaining() is compile >>>>>>>>>>>>>>>>> constant 1, >>>>>>>>>>>>>>>>> which enables the compiler to simplify the extra loops that are >>>>>>>>>>>>>>>>> added >>>>>>>>>>>>>>>>> for batching and produce code that is equivalent (and equally >>>>>>>>>>>>>>>>> performant) as the previous implementation. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> This change addresses the core-mm refactoring only and a separate >>>>>>>>>>>>>>>>> change >>>>>>>>>>>>>>>>> will implement pte_batch_remaining(), ptep_set_wrprotects() and >>>>>>>>>>>>>>>>> set_ptes_full() in the arm64 backend to realize the performance >>>>>>>>>>>>>>>>> improvement as part of the work to enable contpte mappings. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> To ensure the arm64 is performant once implemented, this change is >>>>>>>>>>>>>>>>> very >>>>>>>>>>>>>>>>> careful to only call ptep_get() once per pte batch. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> The following microbenchmark results demonstate that there is no >>>>>>>>>>>>>>>>> significant performance change after this patch. Fork is called >>>>>>>>>>>>>>>>> in a >>>>>>>>>>>>>>>>> tight loop in a process with 1G of populated memory and the time >>>>>>>>>>>>>>>>> for >>>>>>>>>>>>>>>>> the >>>>>>>>>>>>>>>>> function to execute is measured. 100 iterations per run, 8 runs >>>>>>>>>>>>>>>>> performed on both Apple M2 (VM) and Ampere Altra (bare metal). >>>>>>>>>>>>>>>>> Tests >>>>>>>>>>>>>>>>> performed for case where 1G memory is comprised of order-0 >>>>>>>>>>>>>>>>> folios and >>>>>>>>>>>>>>>>> case where comprised of pte-mapped order-9 folios. Negative is >>>>>>>>>>>>>>>>> faster, >>>>>>>>>>>>>>>>> positive is slower, compared to baseline upon which the series is >>>>>>>>>>>>>>>>> based: >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> | Apple M2 VM   | order-0 (pte-map) | order-9 (pte-map) | >>>>>>>>>>>>>>>>> | fork          |-------------------|-------------------| >>>>>>>>>>>>>>>>> | microbench    |    mean |   stdev |    mean |   stdev | >>>>>>>>>>>>>>>>> |---------------|---------|---------|---------|---------| >>>>>>>>>>>>>>>>> | baseline      |    0.0% |    1.1% |    0.0% |    1.2% | >>>>>>>>>>>>>>>>> | after-change  |   -1.0% |    2.0% |   -0.1% |    1.1% | >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> | Ampere Altra  | order-0 (pte-map) | order-9 (pte-map) | >>>>>>>>>>>>>>>>> | fork          |-------------------|-------------------| >>>>>>>>>>>>>>>>> | microbench    |    mean |   stdev |    mean |   stdev | >>>>>>>>>>>>>>>>> |---------------|---------|---------|---------|---------| >>>>>>>>>>>>>>>>> | baseline      |    0.0% |    1.0% |    0.0% |    0.1% | >>>>>>>>>>>>>>>>> | after-change  |   -0.1% |    1.2% |   -0.1% |    0.1% | >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> Tested-by: John Hubbard >>>>>>>>>>>>>>>>> Reviewed-by: Alistair Popple >>>>>>>>>>>>>>>>> Signed-off-by: Ryan Roberts >>>>>>>>>>>>>>>>> --- >>>>>>>>>>>>>>>>>          include/linux/pgtable.h | 80 >>>>>>>>>>>>>>>>> +++++++++++++++++++++++++++++++++++ >>>>>>>>>>>>>>>>>          mm/memory.c             | 92 >>>>>>>>>>>>>>>>> ++++++++++++++++++++++++++--------------- >>>>>>>>>>>>>>>>>          2 files changed, 139 insertions(+), 33 deletions(-) >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >>>>>>>>>>>>>>>>> index af7639c3b0a3..db93fb81465a 100644 >>>>>>>>>>>>>>>>> --- a/include/linux/pgtable.h >>>>>>>>>>>>>>>>> +++ b/include/linux/pgtable.h >>>>>>>>>>>>>>>>> @@ -205,6 +205,27 @@ static inline int pmd_young(pmd_t pmd) >>>>>>>>>>>>>>>>>          #define arch_flush_lazy_mmu_mode()    do {} while (0) >>>>>>>>>>>>>>>>>          #endif >>>>>>>>>>>>>>>>>          +#ifndef pte_batch_remaining >>>>>>>>>>>>>>>>> +/** >>>>>>>>>>>>>>>>> + * pte_batch_remaining - Number of pages from addr to next batch >>>>>>>>>>>>>>>>> boundary. >>>>>>>>>>>>>>>>> + * @pte: Page table entry for the first page. >>>>>>>>>>>>>>>>> + * @addr: Address of the first page. >>>>>>>>>>>>>>>>> + * @end: Batch ceiling (e.g. end of vma). >>>>>>>>>>>>>>>>> + * >>>>>>>>>>>>>>>>> + * Some architectures (arm64) can efficiently modify a contiguous >>>>>>>>>>>>>>>>> batch of >>>>>>>>>>>>>>>>> ptes. >>>>>>>>>>>>>>>>> + * In such cases, this function returns the remaining number of >>>>>>>>>>>>>>>>> pages to >>>>>>>>>>>>>>>>> the end >>>>>>>>>>>>>>>>> + * of the current batch, as defined by addr. This can be useful >>>>>>>>>>>>>>>>> when >>>>>>>>>>>>>>>>> iterating >>>>>>>>>>>>>>>>> + * over ptes. >>>>>>>>>>>>>>>>> + * >>>>>>>>>>>>>>>>> + * May be overridden by the architecture, else batch size is >>>>>>>>>>>>>>>>> always 1. >>>>>>>>>>>>>>>>> + */ >>>>>>>>>>>>>>>>> +static inline unsigned int pte_batch_remaining(pte_t pte, unsigned >>>>>>>>>>>>>>>>> long >>>>>>>>>>>>>>>>> addr, >>>>>>>>>>>>>>>>> +                        unsigned long end) >>>>>>>>>>>>>>>>> +{ >>>>>>>>>>>>>>>>> +    return 1; >>>>>>>>>>>>>>>>> +} >>>>>>>>>>>>>>>>> +#endif >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> It's a shame we now lose the optimization for all other >>>>>>>>>>>>>>>> archtiectures. >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Was there no way to have some basic batching mechanism that doesn't >>>>>>>>>>>>>>>> require >>>>>>>>>>>>>>>> arch >>>>>>>>>>>>>>>> specifics? >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> I tried a bunch of things but ultimately the way I've done it was the >>>>>>>>>>>>>>> only >>>>>>>>>>>>>>> way >>>>>>>>>>>>>>> to reduce the order-0 fork regression to 0. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> My original v3 posting was costing 5% extra and even my first attempt >>>>>>>>>>>>>>> at an >>>>>>>>>>>>>>> arch-specific version that didn't resolve to a compile-time >>>>>>>>>>>>>>> constant 1 >>>>>>>>>>>>>>> still >>>>>>>>>>>>>>> cost an extra 3%. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> I'd have thought that something very basic would have worked like: >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> * Check if PTE is the same when setting the PFN to 0. >>>>>>>>>>>>>>>> * Check that PFN is consecutive >>>>>>>>>>>>>>>> * Check that all PFNs belong to the same folio >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> I haven't tried this exact approach, but I'd be surprised if I can >>>>>>>>>>>>>>> get >>>>>>>>>>>>>>> the >>>>>>>>>>>>>>> regression under 4% with this. Further along the series I spent a >>>>>>>>>>>>>>> lot of >>>>>>>>>>>>>>> time >>>>>>>>>>>>>>> having to fiddle with the arm64 implementation; every conditional and >>>>>>>>>>>>>>> every >>>>>>>>>>>>>>> memory read (even when in cache) was a problem. There is just so >>>>>>>>>>>>>>> little in >>>>>>>>>>>>>>> the >>>>>>>>>>>>>>> inner loop that every instruction matters. (At least on Ampere Altra >>>>>>>>>>>>>>> and >>>>>>>>>>>>>>> Apple >>>>>>>>>>>>>>> M2). >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> Of course if you're willing to pay that 4-5% for order-0 then the >>>>>>>>>>>>>>> benefit to >>>>>>>>>>>>>>> order-9 is around 10% in my measurements. Personally though, I'd >>>>>>>>>>>>>>> prefer to >>>>>>>>>>>>>>> play >>>>>>>>>>>>>>> safe and ensure the common order-0 case doesn't regress, as you >>>>>>>>>>>>>>> previously >>>>>>>>>>>>>>> suggested. >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> I just hacked something up, on top of my beloved rmap cleanup/batching >>>>>>>>>>>>>> series. I >>>>>>>>>>>>>> implemented very generic and simple batching for large folios (all PTE >>>>>>>>>>>>>> bits >>>>>>>>>>>>>> except the PFN have to match). >>>>>>>>>>>>>> >>>>>>>>>>>>>> Some very quick testing (don't trust each last % ) on Intel(R) Xeon(R) >>>>>>>>>>>>>> Silver >>>>>>>>>>>>>> 4210R CPU. >>>>>>>>>>>>>> >>>>>>>>>>>>>> order-0: 0.014210 -> 0.013969 >>>>>>>>>>>>>> >>>>>>>>>>>>>> -> Around 1.7 % faster >>>>>>>>>>>>>> >>>>>>>>>>>>>> order-9: 0.014373 -> 0.009149 >>>>>>>>>>>>>> >>>>>>>>>>>>>> -> Around 36.3 % faster >>>>>>>>>>>>> >>>>>>>>>>>>> Well I guess that shows me :) >>>>>>>>>>>>> >>>>>>>>>>>>> I'll do a review and run the tests on my HW to see if it concurs. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> I pushed a simple compile fixup (we need pte_next_pfn()). >>>>>>>>>>> >>>>>>>>>>> I've just been trying to compile and noticed this. Will take a look at >>>>>>>>>>> your >>>>>>>>>>> update. >>>>>>>>>>> >>>>>>>>>>> But upon review, I've noticed the part that I think makes this difficult >>>>>>>>>>> for >>>>>>>>>>> arm64 with the contpte optimization; You are calling ptep_get() for every >>>>>>>>>>> pte in >>>>>>>>>>> the batch. While this is functionally correct, once arm64 has the contpte >>>>>>>>>>> changes, its ptep_get() has to read every pte in the contpte block in >>>>>>>>>>> order to >>>>>>>>>>> gather the access and dirty bits. So if your batching function ends up >>>>>>>>>>> wealking >>>>>>>>>>> a 16 entry contpte block, that will cause 16 x 16 reads, which kills >>>>>>>>>>> performance. That's why I added the arch-specific pte_batch_remaining() >>>>>>>>>>> function; this allows the core-mm to skip to the end of the contpte >>>>>>>>>>> block and >>>>>>>>>>> avoid ptep_get() for the 15 tail ptes. So we end up with 16 READ_ONCE()s >>>>>>>>>>> instead >>>>>>>>>>> of 256. >>>>>>>>>>> >>>>>>>>>>> I considered making a ptep_get_noyoungdirty() variant, which would avoid >>>>>>>>>>> the >>>>>>>>>>> bit >>>>>>>>>>> gathering. But we have a similar problem in zap_pte_range() and that >>>>>>>>>>> function >>>>>>>>>>> needs the dirty bit to update the folio. So it doesn't work there. (see >>>>>>>>>>> patch 3 >>>>>>>>>>> in my series). >>>>>>>>>>> >>>>>>>>>>> I guess you are going to say that we should combine both approaches, so >>>>>>>>>>> that >>>>>>>>>>> your batching loop can skip forward an arch-provided number of ptes? That >>>>>>>>>>> would >>>>>>>>>>> certainly work, but feels like an orthogonal change to what I'm trying to >>>>>>>>>>> achieve :). Anyway, I'll spend some time playing with it today. >>>>>>>>>> >>>>>>>>>> You can overwrite the function or add special-casing internally, yes. >>>>>>>>>> >>>>>>>>>> Right now, your patch is called "mm: Batch-copy PTE ranges during fork()" >>>>>>>>>> and it >>>>>>>>>> doesn't do any of that besides preparing for some arm64 work. >>>>>>>>>> >>>>>>>>> >>>>>>>>> Well it allows an arch to opt-in to batching. But I see your point. >>>>>>>>> >>>>>>>>> How do you want to handle your patches? Do you want to clean them up and >>>>>>>>> I'll >>>>>>>>> base my stuff on top? Or do you want me to take them and sort it all out? >>>>>>>> >>>>>>>> Whatever you prefer, it was mostly a quick prototype to see if we can >>>>>>>> achieve >>>>>>>> decent performance. >>>>>>> >>>>>>> I'm about to run it on Altra and M2. But I assume it will show similar >>>>>>> results. >>>>> >>>>> OK results in, not looking great, which aligns with my previous experience. >>>>> That >>>>> said, I'm seeing some "BUG: Bad page state in process gmain  pfn:12a094" so >>>>> perhaps these results are not valid... >>>> >>>> I didn't see that so far on x86, maybe related to the PFN fixup? >>> >>> All I've done is define PFN_PTE_SHIFT for arm64 on top of your latest patch: >>> >>> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h >>> index b19a8aee684c..9eb0fd693df9 100644 >>> --- a/arch/arm64/include/asm/pgtable.h >>> +++ b/arch/arm64/include/asm/pgtable.h >>> @@ -359,6 +359,8 @@ static inline void set_ptes(struct mm_struct *mm, >>>   } >>>   #define set_ptes set_ptes >>>   +#define PFN_PTE_SHIFT          PAGE_SHIFT >>> + >>>   /* >>>    * Huge pte definitions. >>>    */ >>> >>> >>> As an aside, I think there is a bug in arm64's set_ptes() for PA > 48-bit >>> case. But that won't affect this. >>> >>> >>> With VM_DEBUG on, this is the first warning I see during boot: >>> >>> >>> [    0.278110] page:00000000c7ced4e8 refcount:12 mapcount:0 >>> mapping:00000000b2f9739b index:0x1a8 pfn:0x1bff30 >>> [    0.278742] head:00000000c7ced4e8 order:2 entire_mapcount:0 >>> nr_pages_mapped:2 pincount:0 >> >> ^ Ah, you are running with mTHP. Let me play with that. > > Err... Its in mm-unstable, but I'm not enabling any sizes. It should only be set > up for PMD-sized THP. > > I am using XFS though, so I imagine its a file folio. > > I've rebased your rmap cleanup and fork batching to the version of mm-unstable > that I was doing all my other testing with so I could compare numbers. But its > not very old (perhaps a week). All the patches applied without any conflict. I think it was something stupid: I would get "17" from folio_pte_batch() for an order-4 folio, but only sometimes. The rmap sanity checks were definitely worth it :) I guess we hit the case "next mapped folio is actually the next physical folio" and the detection for that was off by one. diff --git a/mm/memory.c b/mm/memory.c index 187d1b9b70e2..2af34add7ed7 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -975,7 +975,7 @@ static inline int folio_pte_batch(struct folio *folio, unsigned long addr, * corner cases the next PFN might fall into a different * folio. */ - if (pte_pfn(pte) == folio_end_pfn - 1) + if (pte_pfn(pte) == folio_end_pfn) break; Briefly tested, have to do more testing. I only tested with order-9, which means max_nr would cap at 512. Shouldn't affect the performance measurements, will redo them. -- Cheers, David / dhildenb