From: Alexandre Ghiti <alex@ghiti.fr>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Will Deacon <will@kernel.org>,
"Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>,
Andrew Morton <akpm@linux-foundation.org>,
Nick Piggin <npiggin@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arch@vger.kernel.org, linux-mm@kvack.org
Subject: Re: [PATCH 4/4] riscv: enable HAVE_FAST_GUP if MMU
Date: Thu, 4 Jan 2024 11:46:14 +0100 [thread overview]
Message-ID: <509f3dd7-1c38-4b98-b21b-28d50399a344@ghiti.fr> (raw)
In-Reply-To: <ZZOCRZjBch1grrFp@xhacker>
On 02/01/2024 04:25, Jisheng Zhang wrote:
> On Sun, Dec 31, 2023 at 07:37:33AM +0100, Alexandre Ghiti wrote:
>> On 19/12/2023 18:50, Jisheng Zhang wrote:
>>> Activate the fast gup for riscv mmu platforms. Here are some
>>> GUP_FAST_BENCHMARK performance numbers:
>>>
>>> Before the patch:
>>> GUP_FAST_BENCHMARK: Time: get:53203 put:5085 us
>>>
>>> After the patch:
>>> GUP_FAST_BENCHMARK: Time: get:17711 put:5060 us
>>
>> On which platform did you run this benchmark?
> T-HEAD th1520(cpufreq isn't enabled since the clk/pll isn't upstreamed,
> so cpu is running at the default freq set by u-boot)
>>
>>> The get time is reduced by 66.7%! IOW, 3x get speed!
>>
>> Well done!
>>
>> Thanks,
>>
>> Alex
>>
>>
>>> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
>>> ---
>>> arch/riscv/Kconfig | 1 +
>>> arch/riscv/include/asm/pgtable.h | 6 ++++++
>>> 2 files changed, 7 insertions(+)
>>>
>>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>>> index d3555173d9f4..04df9920282d 100644
>>> --- a/arch/riscv/Kconfig
>>> +++ b/arch/riscv/Kconfig
>>> @@ -119,6 +119,7 @@ config RISCV
>>> select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
>>> select HAVE_FUNCTION_TRACER if !XIP_KERNEL && !PREEMPTION
>>> select HAVE_EBPF_JIT if MMU
>>> + select HAVE_FAST_GUP if MMU
>>> select HAVE_FUNCTION_ARG_ACCESS_API
>>> select HAVE_FUNCTION_ERROR_INJECTION
>>> select HAVE_GCC_PLUGINS
>>> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
>>> index ab00235b018f..c6eb214139e6 100644
>>> --- a/arch/riscv/include/asm/pgtable.h
>>> +++ b/arch/riscv/include/asm/pgtable.h
>>> @@ -673,6 +673,12 @@ static inline int pmd_write(pmd_t pmd)
>>> return pte_write(pmd_pte(pmd));
>>> }
>>> +#define pud_write pud_write
>>> +static inline int pud_write(pud_t pud)
>>> +{
>>> + return pte_write(pud_pte(pud));
>>> +}
>>> +
>>> static inline int pmd_dirty(pmd_t pmd)
>>> {
>>> return pte_dirty(pmd_pte(pmd));
Thanks, you can add:
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Thanks,
Alex
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-01-04 10:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-19 17:50 [PATCH 0/4] riscv: support fast gup Jisheng Zhang
2023-12-19 17:50 ` [PATCH 1/4] riscv: tlb: fix __p*d_free_tlb() Jisheng Zhang
2023-12-31 6:21 ` Alexandre Ghiti
2024-02-07 7:28 ` Alexandre Ghiti
2024-01-04 10:55 ` Alexandre Ghiti
2024-01-10 14:52 ` Palmer Dabbelt
2023-12-19 17:50 ` [PATCH 2/4] riscv: tlb: convert __p*d_free_tlb() to inline functions Jisheng Zhang
2023-12-20 2:59 ` [External] " yunhui cui
2023-12-20 12:57 ` Jisheng Zhang
2023-12-31 6:24 ` Alexandre Ghiti
2023-12-19 17:50 ` [PATCH 3/4] riscv: enable MMU_GATHER_RCU_TABLE_FREE for SMP && MMU Jisheng Zhang
2023-12-31 6:32 ` Alexandre Ghiti
2024-01-02 3:23 ` Jisheng Zhang
2024-01-04 10:45 ` Alexandre Ghiti
2023-12-19 17:50 ` [PATCH 4/4] riscv: enable HAVE_FAST_GUP if MMU Jisheng Zhang
2023-12-31 6:37 ` Alexandre Ghiti
2024-01-02 3:25 ` Jisheng Zhang
2024-01-04 10:46 ` Alexandre Ghiti [this message]
2024-01-25 21:30 ` [PATCH 0/4] riscv: support fast gup patchwork-bot+linux-riscv
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