From: Andrew Cooper <andrew.cooper3@citrix.com>
To: hpa@zytor.com
Cc: acme@redhat.com, aik@amd.com, akpm@linux-foundation.org,
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Subject: Re: [PATCHv8 14/17] x86/traps: Handle LASS thrown #SS
Date: Thu, 3 Jul 2025 00:42:27 +0100 [thread overview]
Message-ID: <4dcd23cb-eb55-42e7-aa76-dbaf2e2a7e07@citrix.com> (raw)
In-Reply-To: <4DE45AFD-C1E0-4FB8-BE01-44A72C5C6E1E@zytor.com>
> Note: for a FRED system, ERETU can generate #SS for a non-canonical user space RSP
How? Or to phrase it differently, I hope not.
%rsp is a 64bit value and does not have canonical restrictions elsewhere
in the architecture, so far as I'm aware. IRET really can restore a
non-canonical %rsp, and userspace can run for an indeterminate period of
time with a non-canonical %rsp as long as there are no stack accesses.
Accesses relative to the the stack using a non-canonical pointer will
suffer #SS, but ERETU doesn't modify the userspace stack AFAICT. I
can't see anything in the ERETU pseudocode in the FRED spec that
mentions a canonical check or memory access using %rsp.
~Andrew
next prev parent reply other threads:[~2025-07-02 23:42 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20250701095849.2360685-1-kirill.shutemov@linux.intel.com>
[not found] ` <20250701095849.2360685-4-kirill.shutemov@linux.intel.com>
2025-07-01 18:44 ` [PATCHv8 03/17] x86/alternatives: Disable LASS when patching kernel alternatives Sohil Mehta
[not found] ` <20250701095849.2360685-5-kirill.shutemov@linux.intel.com>
2025-07-01 19:03 ` [PATCHv8 04/17] x86/cpu: Defer CR pinning setup until after EFI initialization Sohil Mehta
2025-07-02 9:47 ` Kirill A. Shutemov
2025-07-01 23:10 ` Dave Hansen
2025-07-02 10:05 ` Kirill A. Shutemov
2025-07-04 12:23 ` Kirill A. Shutemov
[not found] ` <20250701095849.2360685-12-kirill.shutemov@linux.intel.com>
2025-07-01 22:51 ` [PATCHv8 11/17] x86/cpu: Set LASS CR4 bit as pinning sensitive Sohil Mehta
[not found] ` <20250701095849.2360685-16-kirill.shutemov@linux.intel.com>
2025-07-01 23:03 ` [PATCHv8 15/17] x86/cpu: Make LAM depend on LASS Sohil Mehta
[not found] ` <20250701095849.2360685-18-kirill.shutemov@linux.intel.com>
2025-07-01 23:13 ` [PATCHv8 17/17] x86: Re-enable Linear Address Masking Sohil Mehta
[not found] ` <20250701095849.2360685-13-kirill.shutemov@linux.intel.com>
2025-07-02 0:36 ` [PATCHv8 12/17] x86/traps: Communicate a LASS violation in #GP message Sohil Mehta
2025-07-02 10:10 ` Kirill A. Shutemov
[not found] ` <20250701095849.2360685-14-kirill.shutemov@linux.intel.com>
2025-07-02 0:54 ` [PATCHv8 13/17] x86/traps: Generalize #GP address decode and hint code Sohil Mehta
[not found] ` <20250701095849.2360685-15-kirill.shutemov@linux.intel.com>
2025-07-02 1:35 ` [PATCHv8 14/17] x86/traps: Handle LASS thrown #SS Sohil Mehta
2025-07-02 2:00 ` H. Peter Anvin
2025-07-02 2:06 ` H. Peter Anvin
2025-07-02 10:17 ` Kirill A. Shutemov
2025-07-02 14:37 ` H. Peter Anvin
2025-07-02 14:47 ` Kirill A. Shutemov
2025-07-02 17:10 ` H. Peter Anvin
2025-07-02 23:42 ` Andrew Cooper [this message]
2025-07-03 0:44 ` H. Peter Anvin
2025-07-06 9:22 ` David Laight
2025-07-06 15:07 ` H. Peter Anvin
2025-07-02 13:27 ` Kirill A. Shutemov
2025-07-02 17:56 ` Sohil Mehta
2025-07-03 10:40 ` Kirill A. Shutemov
2025-07-02 20:05 ` Sohil Mehta
2025-07-03 11:31 ` Kirill A. Shutemov
2025-07-03 20:12 ` Sohil Mehta
2025-07-04 9:23 ` Kirill A. Shutemov
[not found] ` <20250701095849.2360685-3-kirill.shutemov@linux.intel.com>
2025-07-03 8:44 ` [PATCHv8 02/17] x86/asm: Introduce inline memcpy and memset David Laight
2025-07-03 10:39 ` Kirill A. Shutemov
2025-07-03 12:15 ` David Laight
2025-07-03 13:33 ` Vegard Nossum
2025-07-03 16:52 ` David Laight
2025-07-03 14:10 ` Kirill A. Shutemov
2025-07-03 17:02 ` David Laight
2025-07-03 17:13 ` Dave Hansen
2025-07-04 9:04 ` Kirill A. Shutemov
2025-07-06 9:13 ` David Laight
2025-07-07 8:02 ` Kirill A. Shutemov
2025-07-07 9:33 ` David Laight
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