From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from psmtp.com (na3sys010amx199.postini.com [74.125.245.199]) by kanga.kvack.org (Postfix) with SMTP id 290416B004D for ; Mon, 30 Jan 2012 04:51:44 -0500 (EST) Message-ID: <4F26681A.3090507@hitachi.com> Date: Mon, 30 Jan 2012 18:51:22 +0900 From: Masami Hiramatsu MIME-Version: 1.0 Subject: Re: [PATCH v9 3.2 1/9] uprobes: Install and remove breakpoints. References: <20120110114821.17610.9188.sendpatchset@srdronam.in.ibm.com> <20120110114831.17610.88468.sendpatchset@srdronam.in.ibm.com> <4F215FCE.8010209@hitachi.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Sender: owner-linux-mm@kvack.org List-ID: To: Denys Vlasenko Cc: Srikar Dronamraju , Peter Zijlstra , Linus Torvalds , Oleg Nesterov , Ingo Molnar , Andrew Morton , LKML , Linux-mm , Andi Kleen , Christoph Hellwig , Steven Rostedt , Roland McGrath , Thomas Gleixner , Arnaldo Carvalho de Melo , Anton Arapov , Ananth N Mavinakayanahalli , Jim Keniston , Stephen Rothwell , yrl.pp-manager.tt@hitachi.com (2012/01/27 3:28), Denys Vlasenko wrote: > On Thu, Jan 26, 2012 at 3:14 PM, Masami Hiramatsu > wrote: >> (2012/01/26 0:32), Denys Vlasenko wrote: >>> On Wed, Jan 25, 2012 at 4:13 PM, Denys Vlasenko >>> wrote: >>>>> + /* >>>>> + * Convert from rip-relative addressing to indirect addressing >>>>> + * via a scratch register. Change the r/m field from 0x5 (%rip) >>>>> + * to 0x0 (%rax) or 0x1 (%rcx), and squeeze out the offset field. >>>>> + */ >>>>> + reg = MODRM_REG(insn); >>>>> + if (reg == 0) { >>>>> + /* >>>>> + * The register operand (if any) is either the A register >>>>> + * (%rax, %eax, etc.) or (if the 0x4 bit is set in the >>>>> + * REX prefix) %r8. In any case, we know the C register >>>>> + * is NOT the register operand, so we use %rcx (register >>>>> + * #1) for the scratch register. >>>>> + */ >>>>> + uprobe->arch_info.fixups = UPROBES_FIX_RIP_CX; >>>>> + /* Change modrm from 00 000 101 to 00 000 001. */ >>>>> + *cursor = 0x1; >>> >>> Hmm. I think we have a bug here. >>> >>> What if this instruction has REX.B = 1? Granted, REX.B = 1 has no effect on >>> rip-relative addressing and therefore normally won't be generated by gcc/as, >>> but still. If you replace md and r/m fields as above, you are trying to convert >>> 0x12345678(%rip) reference to (%rcx), but if REX.B = 1, then you in fact >>> converted it to (%r9)! >> >> Right, thanks for finding :) >> And %rax register reference encoding has same problem, doesn't it? > > Yes. > > The solution is trivial: "if (REX pfx exists) REX.B = 0;" > > Also, I don't remember whether (%rip) addressing is > affected by 0x67 (address size) prefix. If it is, then > nothing needs to be done. In Intel SDM vol.2, "2.2.1.6 RIP-Relative Addressing" explains that as below; --- RIP-relative addressing is enabled by 64-bit mode, not by a 64-bit address-size. The use of the address-size prefix does not disable RIP-relative addressing. The effect of the address-size prefix is to truncate and zero-extend the computed effective address to 32 bits. --- This means 0x67 pfx can be used with RIP-relative, and effective address(EA) will be 32bit, as same as others. So, I think it should work :) Thank you! -- Masami HIRAMATSU Software Platform Research Dept. Linux Technology Center Hitachi, Ltd., Yokohama Research Laboratory E-mail: masami.hiramatsu.pt@hitachi.com -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Fight unfair telecom internet charges in Canada: sign http://stopthemeter.ca/ Don't email: email@kvack.org