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From: "H. Peter Anvin" <hpa@zytor.com>
To: Sohil Mehta <sohil.mehta@intel.com>,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, Peter Zijlstra <peterz@infradead.org>,
	Ard Biesheuvel <ardb@kernel.org>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Josh Poimboeuf <jpoimboe@kernel.org>,
	Xiongwei Song <xiongwei.song@windriver.com>,
	Xin Li <xin3.li@intel.com>,
	"Mike Rapoport (IBM)" <rppt@kernel.org>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Michael Roth <michael.roth@amd.com>,
	Tony Luck <tony.luck@intel.com>,
	Alexey Kardashevskiy <aik@amd.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jonathan Corbet <corbet@lwn.net>, Ingo Molnar <mingo@kernel.org>,
	Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
	Daniel Sneddon <daniel.sneddon@linux.intel.com>,
	Kai Huang <kai.huang@intel.com>,
	Sandipan Das <sandipan.das@amd.com>,
	Breno Leitao <leitao@debian.org>,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
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	Juergen Gross <jgross@suse.com>,
	Vegard Nossum <vegard.nossum@oracle.com>,
	Kees Cook <kees@kernel.org>, Eric Biggers <ebiggers@google.com>,
	Jason Gunthorpe <jgg@ziepe.ca>,
	"Masami Hiramatsu (Google)" <mhiramat@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>,
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	Yuntao Wang <ytcoode@gmail.com>,
	Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Tejun Heo <tj@kernel.org>, Changbin Du <changbin.du@huawei.com>,
	Huang Shijie <shijie@os.amperecomputing.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Namhyung Kim <namhyung@kernel.org>,
	Arnaldo Carvalho de Melo <acme@redhat.com>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-efi@vger.kernel.org, linux-mm@kvack.org
Subject: Re: [PATCHv8 14/17] x86/traps: Handle LASS thrown #SS
Date: Tue, 01 Jul 2025 19:06:10 -0700	[thread overview]
Message-ID: <4DE45AFD-C1E0-4FB8-BE01-44A72C5C6E1E@zytor.com> (raw)
In-Reply-To: <95dc18fd-73b0-4019-92d2-c0e6aaf22c96@intel.com>

On July 1, 2025 6:35:40 PM PDT, Sohil Mehta <sohil.mehta@intel.com> wrote:
>On 7/1/2025 2:58 AM, Kirill A. Shutemov wrote:
>> LASS throws a #GP for any violations except for stack register accesses,
>> in which case it throws a #SS instead. Handle this similarly to how other
>> LASS violations are handled.
>> 
>
>Maybe I've misunderstood something:
>
>Is the underlying assumption here that #SS were previously only
>generated by userspace, but now they can also be generated by the
>kernel? And we want the kernel generated #SS to behave the same as the #GP?
>
>> In case of FRED, before handling #SS as LASS violation, kernel has to
>> check if there's a fixup for the exception. It can address #SS due to
>> invalid user context on ERETU. See 5105e7687ad3 ("x86/fred: Fixup
>> fault on ERETU by jumping to fred_entrypoint_user") for more details.
>> 
>> Co-developed-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
>> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
>> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
>> ---
>>  arch/x86/kernel/traps.c | 39 +++++++++++++++++++++++++++++++++------
>>  1 file changed, 33 insertions(+), 6 deletions(-)
>> 
>> diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
>> index ceb091f17a5b..f9ca5b911141 100644
>> --- a/arch/x86/kernel/traps.c
>> +++ b/arch/x86/kernel/traps.c
>> @@ -418,12 +418,6 @@ DEFINE_IDTENTRY_ERRORCODE(exc_segment_not_present)
>>  		      SIGBUS, 0, NULL);
>>  }
>>  
>> -DEFINE_IDTENTRY_ERRORCODE(exc_stack_segment)
>> -{
>> -	do_error_trap(regs, error_code, "stack segment", X86_TRAP_SS, SIGBUS,
>> -		      0, NULL);
>> -}
>> -
>>  DEFINE_IDTENTRY_ERRORCODE(exc_alignment_check)
>>  {
>>  	char *str = "alignment check";
>> @@ -866,6 +860,39 @@ DEFINE_IDTENTRY_ERRORCODE(exc_general_protection)
>>  	cond_local_irq_disable(regs);
>>  }
>>  
>> +#define SSFSTR "stack segment fault"
>> +
>> +DEFINE_IDTENTRY_ERRORCODE(exc_stack_segment)
>> +{
>> +	if (user_mode(regs))
>> +		goto error_trap;
>> +
>> +	if (cpu_feature_enabled(X86_FEATURE_FRED) &&
>> +	    fixup_exception(regs, X86_TRAP_SS, error_code, 0))
>> +		return;
>> +
>> +	if (cpu_feature_enabled(X86_FEATURE_LASS)) {
>> +		enum kernel_exc_hint hint;
>> +		unsigned long exc_addr;
>> +
>> +		hint = get_kernel_exc_address(regs, &exc_addr);
>> +		if (hint != EXC_NO_HINT) {
>
>The brackets are not needed for singular statements. Also the max line
>length is longer now. You can fit this all in a single line.
>
>> +			printk(SSFSTR ", %s 0x%lx", kernel_exc_hint_help[hint],
>> +			       exc_addr);
>> +		}
>> +
>
>> +		if (hint != EXC_NON_CANONICAL)
>> +			exc_addr = 0;
>> +
>> +		die_addr(SSFSTR, regs, error_code, exc_addr);
>
>The variable names in die_addr() should be generalized as well. They
>seem to assume the caller to be a #GP handler.
>
>> +		return;
>> +	}
>> +
>> +error_trap:
>> +	do_error_trap(regs, error_code, "stack segment", X86_TRAP_SS, SIGBUS,
>> +		      0, NULL);
>> +}
>> +
>>  static bool do_int3(struct pt_regs *regs)
>>  {
>>  	int res;
>

Note: for a FRED system, ERETU can generate #SS for a non-canonical user space RSP even in the absence of LASS, so if that is not currently handled that is an active bug.


  parent reply	other threads:[~2025-07-02  2:07 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20250701095849.2360685-1-kirill.shutemov@linux.intel.com>
     [not found] ` <20250701095849.2360685-4-kirill.shutemov@linux.intel.com>
2025-07-01 18:44   ` [PATCHv8 03/17] x86/alternatives: Disable LASS when patching kernel alternatives Sohil Mehta
     [not found] ` <20250701095849.2360685-12-kirill.shutemov@linux.intel.com>
2025-07-01 22:51   ` [PATCHv8 11/17] x86/cpu: Set LASS CR4 bit as pinning sensitive Sohil Mehta
     [not found] ` <20250701095849.2360685-16-kirill.shutemov@linux.intel.com>
2025-07-01 23:03   ` [PATCHv8 15/17] x86/cpu: Make LAM depend on LASS Sohil Mehta
     [not found] ` <20250701095849.2360685-5-kirill.shutemov@linux.intel.com>
2025-07-01 19:03   ` [PATCHv8 04/17] x86/cpu: Defer CR pinning setup until after EFI initialization Sohil Mehta
2025-07-02  9:47     ` Kirill A. Shutemov
2025-07-01 23:10   ` Dave Hansen
2025-07-02 10:05     ` Kirill A. Shutemov
2025-07-04 12:23       ` Kirill A. Shutemov
     [not found] ` <20250701095849.2360685-18-kirill.shutemov@linux.intel.com>
2025-07-01 23:13   ` [PATCHv8 17/17] x86: Re-enable Linear Address Masking Sohil Mehta
     [not found] ` <20250701095849.2360685-13-kirill.shutemov@linux.intel.com>
2025-07-02  0:36   ` [PATCHv8 12/17] x86/traps: Communicate a LASS violation in #GP message Sohil Mehta
2025-07-02 10:10     ` Kirill A. Shutemov
     [not found] ` <20250701095849.2360685-14-kirill.shutemov@linux.intel.com>
2025-07-02  0:54   ` [PATCHv8 13/17] x86/traps: Generalize #GP address decode and hint code Sohil Mehta
     [not found] ` <20250701095849.2360685-15-kirill.shutemov@linux.intel.com>
2025-07-02  1:35   ` [PATCHv8 14/17] x86/traps: Handle LASS thrown #SS Sohil Mehta
2025-07-02  2:00     ` H. Peter Anvin
2025-07-02  2:06     ` H. Peter Anvin [this message]
2025-07-02 10:17       ` Kirill A. Shutemov
2025-07-02 14:37         ` H. Peter Anvin
2025-07-02 14:47           ` Kirill A. Shutemov
2025-07-02 17:10             ` H. Peter Anvin
2025-07-02 23:42       ` Andrew Cooper
2025-07-03  0:44         ` H. Peter Anvin
2025-07-06  9:22       ` David Laight
2025-07-06 15:07         ` H. Peter Anvin
2025-07-02 13:27     ` Kirill A. Shutemov
2025-07-02 17:56       ` Sohil Mehta
2025-07-03 10:40         ` Kirill A. Shutemov
2025-07-02 20:05       ` Sohil Mehta
2025-07-03 11:31         ` Kirill A. Shutemov
2025-07-03 20:12           ` Sohil Mehta
2025-07-04  9:23             ` Kirill A. Shutemov
     [not found] ` <20250701095849.2360685-3-kirill.shutemov@linux.intel.com>
2025-07-03  8:44   ` [PATCHv8 02/17] x86/asm: Introduce inline memcpy and memset David Laight
2025-07-03 10:39     ` Kirill A. Shutemov
2025-07-03 12:15       ` David Laight
2025-07-03 13:33         ` Vegard Nossum
2025-07-03 16:52           ` David Laight
2025-07-03 14:10         ` Kirill A. Shutemov
2025-07-03 17:02           ` David Laight
2025-07-03 17:13   ` Dave Hansen
2025-07-04  9:04     ` Kirill A. Shutemov
2025-07-06  9:13     ` David Laight
2025-07-07  8:02       ` Kirill A. Shutemov
2025-07-07  9:33         ` David Laight

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