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Tue, 1 Sep 2020 07:55:02 +0000 (GMT) Received: from [9.85.87.174] (unknown [9.85.87.174]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 1 Sep 2020 07:55:02 +0000 (GMT) Subject: Re: [PATCH v3 03/13] mm/debug_vm_pgtable/ppc64: Avoid setting top bits in radom value To: Anshuman Khandual , linux-mm@kvack.org, akpm@linux-foundation.org Cc: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-s390@vger.kernel.org, linux-snps-arc@lists.infradead.org, x86@kernel.org, linux-arch@vger.kernel.org, Gerald Schaefer , Christophe Leroy , Vineet Gupta , Mike Rapoport , Qian Cai References: <20200827080438.315345-1-aneesh.kumar@linux.ibm.com> <20200827080438.315345-4-aneesh.kumar@linux.ibm.com> <3a0b0101-e6ec-26c5-e104-5b0bb95c3e51@arm.com> <1a8abe92-032b-f60f-1df1-52bb409b35a3@linux.ibm.com> <75771782-734b-69f6-4a07-2d3542458319@arm.com> From: "Aneesh Kumar K.V" Message-ID: <3f20130a-f9fc-db9d-50a9-76aca5a1a6d7@linux.ibm.com> Date: Tue, 1 Sep 2020 13:25:02 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-01_04:2020-09-01,2020-09-01 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 suspectscore=0 malwarescore=0 clxscore=1015 spamscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009010065 X-Rspamd-Queue-Id: 809B91801E68A X-Spamd-Result: default: False [0.00 / 100.00] X-Rspamd-Server: rspam03 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 9/1/20 1:16 PM, Anshuman Khandual wrote: >=20 >=20 > On 09/01/2020 01:06 PM, Aneesh Kumar K.V wrote: >> On 9/1/20 1:02 PM, Anshuman Khandual wrote: >>> >>> >>> On 09/01/2020 11:51 AM, Aneesh Kumar K.V wrote: >>>> On 9/1/20 8:45 AM, Anshuman Khandual wrote: >>>>> >>>>> >>>>> On 08/27/2020 01:34 PM, Aneesh Kumar K.V wrote: >>>>>> ppc64 use bit 62 to indicate a pte entry (_PAGE_PTE). Avoid settin= g that bit in >>>>>> random value. >>>>>> >>>>>> Signed-off-by: Aneesh Kumar K.V >>>>>> --- >>>>>> =C2=A0=C2=A0 mm/debug_vm_pgtable.c | 13 ++++++++++--- >>>>>> =C2=A0=C2=A0 1 file changed, 10 insertions(+), 3 deletions(-) >>>>>> >>>>>> diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c >>>>>> index 086309fb9b6f..bbf9df0e64c6 100644 >>>>>> --- a/mm/debug_vm_pgtable.c >>>>>> +++ b/mm/debug_vm_pgtable.c >>>>>> @@ -44,10 +44,17 @@ >>>>>> =C2=A0=C2=A0=C2=A0 * entry type. But these bits might affect the = ability to clear entries with >>>>>> =C2=A0=C2=A0=C2=A0 * pxx_clear() because of how dynamic page tabl= e folding works on s390. So >>>>>> =C2=A0=C2=A0=C2=A0 * while loading up the entries do not change t= he lower 4 bits. It does not >>>>>> - * have affect any other platform. >>>>>> + * have affect any other platform. Also avoid the 62nd bit on ppc= 64 that is >>>>>> + * used to mark a pte entry. >>>>>> =C2=A0=C2=A0=C2=A0 */ >>>>>> -#define S390_MASK_BITS=C2=A0=C2=A0=C2=A0 4 >>>>>> -#define RANDOM_ORVALUE=C2=A0=C2=A0=C2=A0 GENMASK(BITS_PER_LONG - = 1, S390_MASK_BITS) >>>>>> +#define S390_SKIP_MASK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 = GENMASK(3, 0) >>>>>> +#ifdef CONFIG_PPC_BOOK3S_64 >>>>>> +#define PPC64_SKIP_MASK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= GENMASK(62, 62) >>>>>> +#else >>>>>> +#define PPC64_SKIP_MASK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= 0x0 >>>>>> +#endif >>>>> >>>>> Please drop the #ifdef CONFIG_PPC_BOOK3S_64 here. We already accomm= odate skip >>>>> bits for a s390 platform requirement and can also do so for ppc64 a= s well. As >>>>> mentioned before, please avoid adding any platform specific constru= cts in the >>>>> test. >>>>> >>>> >>>> >>>> that is needed so that it can be built on 32 bit architectures.I did= face build errors with arch-linux >>> >>> Could not (#if __BITS_PER_LONG =3D=3D 32) be used instead or somethin= g like >>> that. But should be a generic conditional check identifying 32 bit ar= ch >>> not anything platform specific. >>> >> >> that _PAGE_PTE bit is pretty much specific to PPC BOOK3S_64.=C2=A0 Not= sure why other architectures need to bothered about ignoring bit 62. >=20 > Thats okay as long it does not adversely affect other architectures, ig= noring > some more bits is acceptable. Like existing S390_MASK_BITS gets ignored= on all > other platforms even if it is a s390 specific constraint. Not having pl= atform > specific #ifdef here, is essential. >=20 Why is it essential? -aneesh