From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B76AC2BD09 for ; Mon, 15 Jul 2024 08:27:25 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id C93BA6B008C; Mon, 15 Jul 2024 04:27:24 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id C1CB06B0092; Mon, 15 Jul 2024 04:27:24 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id AE4886B0093; Mon, 15 Jul 2024 04:27:24 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 8DDDD6B008C for ; Mon, 15 Jul 2024 04:27:24 -0400 (EDT) Received: from smtpin11.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id 29421A14BB for ; Mon, 15 Jul 2024 08:27:24 +0000 (UTC) X-FDA: 82341307608.11.50C46B4 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf08.hostedemail.com (Postfix) with ESMTP id 5E46C16000F for ; Mon, 15 Jul 2024 08:27:22 +0000 (UTC) Authentication-Results: imf08.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf08.hostedemail.com: domain of anshuman.khandual@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=anshuman.khandual@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1721032012; a=rsa-sha256; cv=none; b=3ZgiOCRTHd2df2SMjkvHs/UYfjCrUzxTlEjLzB6CeF5257CiEmhiNIayxglvZ7TqlUU13e 0+TTaYPOKgRzjOfEzGtyc89YxyqyKYKkLBrTPUthzaQ9Z5yOGXz0UjwT8lX9BkjBlQvDDl elQ4YrN2FxpF55AVQzp2nBuWFs9LHs0= ARC-Authentication-Results: i=1; imf08.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf08.hostedemail.com: domain of anshuman.khandual@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=anshuman.khandual@arm.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1721032012; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yUjaCnDHeagwN88Jr++kpN2taIYlqFsKjuVZXxh3Jb0=; b=ZDo6JGu6W2DFPeqtaQTL/aXdkdPSQuJaAM0qabljmAd/0lday4Ksgi3/Hc8/u8Eoj9wMMx hofuopV1qRMzXvSe0whMGNWHZDVa3lkDt/UodoUmvsRZlACA2V3M3t6HcJSNGH+AQCY4Ny 2WVFbt9FiGKSM7J9MqMokojVpSVwOXc= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E188ADA7; Mon, 15 Jul 2024 01:27:46 -0700 (PDT) Received: from [10.162.40.16] (a077893.blr.arm.com [10.162.40.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 538F93F73F; Mon, 15 Jul 2024 01:27:12 -0700 (PDT) Message-ID: <3c655663-3407-4602-a958-c5382a6b3133@arm.com> Date: Mon, 15 Jul 2024 13:57:10 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/29] arm64: context switch POR_EL0 register To: Joey Gouly , linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@kernel.org, aneesh.kumar@linux.ibm.com, bp@alien8.de, broonie@kernel.org, catalin.marinas@arm.com, christophe.leroy@csgroup.eu, dave.hansen@linux.intel.com, hpa@zytor.com, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, maz@kernel.org, mingo@redhat.com, mpe@ellerman.id.au, naveen.n.rao@linux.ibm.com, npiggin@gmail.com, oliver.upton@linux.dev, shuah@kernel.org, szabolcs.nagy@arm.com, tglx@linutronix.de, will@kernel.org, x86@kernel.org, kvmarm@lists.linux.dev References: <20240503130147.1154804-1-joey.gouly@arm.com> <20240503130147.1154804-7-joey.gouly@arm.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: <20240503130147.1154804-7-joey.gouly@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 5E46C16000F X-Stat-Signature: 3hs14esrze5cidfhgisbbgj9d95fddq8 X-Rspam-User: X-HE-Tag: 1721032042-161615 X-HE-Meta: U2FsdGVkX1+i14nSGxOXsdlx/ZvbzCkhZhYS+cVNr6qrBGzQP471MoefpBhXM2emVbM70EXdwwyhmAXvk+G/2F6ttHdJZsb1kVfIMmcPCiXAiay2Ec+ATODOhpMDO9EcNp38rqmvVovELuE/jEQj/9iGk8yReirpqjSFOuOhWCE8eauxevd3NWCfGOTlXQBnXC6JsPW6b4CiTrNV9pqY9a1GO4jCYklx8Y+xJMEoRV4c1S8AeJ0VEpPxgqxdUZ0B2QXqBxPVV4QpH8YVvo/uxGqxTVUvsR05LQ3ecA12cunORIuXh5mfWA+e/ly4xXhHPzMdZS0W3/1T8REW//KoOKyrQ/G1onr0WA5mlfxhgbE4RZ31WuKAIugd8r6NmcUUAIl/s0g3cD3njRmj3XE8I4oGblSBk2LtcAC06cIUD3XS0nA9vhoo2YT7ju4wpBmpfcn/TekcJsUL+Evx7sxICdGJiCGPF/+02f9MTgCxyZx1g5/AdGC9M4259XxaJQe5Co3CBuSnwhkixUoao9B9pF1QYGuClnJvYq/7inOIOEru9jtg40utL/+7W006Owz/i8A/MEKXVGfooyal1K2HmxvjxvSCTS8/bA2KJ5JV35VDmcbfOzUqjek+48rebPqOeODICWbWyJVygiyxgoVHZvm/d3WO0i5he24cqLB8g+HcfDiVs+0xkNz6ZIIYRRn73GEMpdjPq5R6lUP3X3eQiz56FH9O9AfPy0PQDVGhR885PB441XjnIOzZSAniialNgdlpLUvJFs3gcuj23E/urNVOoYU4XnsJ+gpsceKj/aoU3khNjglYZ9TJeKCjf5Ctw4gboCD4zctHLgMAmaaU1vJsTGhAbUdMrXpx2AnzTKPMnTNFtc4aIN3WVVB8hUsouU74jS+pQarL65707xHdRIWbOthcXOXWZWl5velARJl8u5Waj4lMAURfcY+Y3C81unNXZ/y6bAa6eQDN2mE 0o8VGvMf Ldb7X41BBw9VsK3wJlgwp2hCZ/35j48VVm3unzEBZgVL+Kbq36bOLTfQTAqPBrg7PdBpMpXR9aswrpkLPj/9QK7tulZ0Re8uuQpz+OrvLQxFYWeZRwweiT5+oV8Y5SJTVEqUO14/kSEkpGt9qViFq6yxAJcJN0hD3tQn8y4xfEOMhaI1RcH3oTqwB7BHh/rbfpmx6cBXGENuMUjca1CbJYdd3SSR1T5hyrJgkXjG/6yEfWy1oYaL+7944P/EWEVz4MgegLecnpGbuww0xRmc4fCuojXK0G6tnhMMiX2+3p1XoL+ZwksTO/S/8JQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 5/3/24 18:31, Joey Gouly wrote: > POR_EL0 is a register that can be modified by userspace directly, > so it must be context switched. > > Signed-off-by: Joey Gouly > Cc: Catalin Marinas > Cc: Will Deacon > --- > arch/arm64/include/asm/cpufeature.h | 6 ++++++ > arch/arm64/include/asm/processor.h | 1 + > arch/arm64/include/asm/sysreg.h | 3 +++ > arch/arm64/kernel/process.c | 28 ++++++++++++++++++++++++++++ > 4 files changed, 38 insertions(+) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index 8b904a757bd3..d46aab23e06e 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -832,6 +832,12 @@ static inline bool system_supports_lpa2(void) > return cpus_have_final_cap(ARM64_HAS_LPA2); > } > > +static inline bool system_supports_poe(void) > +{ > + return IS_ENABLED(CONFIG_ARM64_POE) && CONFIG_ARM64_POE has not been defined/added until now ? > + alternative_has_cap_unlikely(ARM64_HAS_S1POE); > +} > + > int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt); > bool try_emulate_mrs(struct pt_regs *regs, u32 isn); > > diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h > index f77371232d8c..e6376f979273 100644 > --- a/arch/arm64/include/asm/processor.h > +++ b/arch/arm64/include/asm/processor.h > @@ -184,6 +184,7 @@ struct thread_struct { > u64 sctlr_user; > u64 svcr; > u64 tpidr2_el0; > + u64 por_el0; > }; As there going to be a new config i.e CONFIG_ARM64_POE, should not this register be wrapped up with #ifdef CONFIG_ARM64_POE as well ? Similarly access into p->thread.por_el0 should also be conditional on that config. > > static inline unsigned int thread_get_vl(struct thread_struct *thread, > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 9e8999592f3a..62c399811dbf 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -1064,6 +1064,9 @@ > #define POE_RXW UL(0x7) > #define POE_MASK UL(0xf) > > +/* Initial value for Permission Overlay Extension for EL0 */ > +#define POR_EL0_INIT POE_RXW The idea behind POE_RXW as the init value is to be all permissive ? > + > #define ARM64_FEATURE_FIELD_BITS 4 > > /* Defined for compatibility only, do not add new users. */ > diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c > index 4ae31b7af6c3..0ffaca98bed6 100644 > --- a/arch/arm64/kernel/process.c > +++ b/arch/arm64/kernel/process.c > @@ -271,12 +271,23 @@ static void flush_tagged_addr_state(void) > clear_thread_flag(TIF_TAGGED_ADDR); > } > > +static void flush_poe(void) > +{ > + if (!system_supports_poe()) > + return; > + > + write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0); > + /* ISB required for kernel uaccess routines when chaning POR_EL0 */ > + isb(); > +} > + > void flush_thread(void) > { > fpsimd_flush_thread(); > tls_thread_flush(); > flush_ptrace_hw_breakpoint(current); > flush_tagged_addr_state(); > + flush_poe(); > } > > void arch_release_task_struct(struct task_struct *tsk) > @@ -371,6 +382,9 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) > if (system_supports_tpidr2()) > p->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0); > > + if (system_supports_poe()) > + p->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); > + > if (stack_start) { > if (is_compat_thread(task_thread_info(p))) > childregs->compat_sp = stack_start; > @@ -495,6 +509,19 @@ static void erratum_1418040_new_exec(void) > preempt_enable(); > } > > +static void permission_overlay_switch(struct task_struct *next) > +{ > + if (!system_supports_poe()) > + return; > + > + current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); > + if (current->thread.por_el0 != next->thread.por_el0) { > + write_sysreg_s(next->thread.por_el0, SYS_POR_EL0); > + /* ISB required for kernel uaccess routines when chaning POR_EL0 */ > + isb(); > + } > +} > + > /* > * __switch_to() checks current->thread.sctlr_user as an optimisation. Therefore > * this function must be called with preemption disabled and the update to > @@ -530,6 +557,7 @@ struct task_struct *__switch_to(struct task_struct *prev, > ssbs_thread_switch(next); > erratum_1418040_thread_switch(next); > ptrauth_thread_switch_user(next); > + permission_overlay_switch(next); > > /* > * Complete any pending TLB or cache maintenance on this CPU in case