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From: Manfred Spraul <manfreds@colorfullife.com>
To: Andrea Arcangeli <andrea@suse.de>
Cc: "Stephen C. Tweedie" <sct@redhat.com>,
	"David S. Miller" <davem@redhat.com>,
	alan@lxorguk.ukuu.org.uk, kanoj@google.engr.sgi.com,
	linux-kernel@vger.rutgers.edu, linux-mm@kvack.org,
	torvalds@transmeta.com
Subject: Re: zap_page_range(): TLB flush race
Date: Tue, 11 Apr 2000 19:45:23 +0200	[thread overview]
Message-ID: <38F364B3.5A4A45D9@colorfullife.com> (raw)
In-Reply-To: <Pine.LNX.4.21.0004111824090.19969-100000@maclaurin.suse.de>

Andrea Arcangeli wrote:
> 
> On Tue, 11 Apr 2000, Manfred Spraul wrote:
> 
> >* They need the old pte value and the virtual address for their flush
> >ipi.
> 
> Why can't they flush all the address space unconditionally on the other
> cpus?

They have a special instruction that flushes one mapping on all cpus in
the system. 
It has 2 parameters:
	* virtual address of the page
	* segment of the physical page to be flushed???

Is someone out there with a s390 asm handbook? I only have these
comments:

+/*
+ * s390 has two ways of flushing TLBs
+ * 'ptlb' does a flush of the local processor
+ * 'ipte' invalidates a pte in a page table and flushes that out of 
+ * the TLBs of all PUs of a SMP 
+ */

+       /*
+        * S390 has 1mb segments, we are emulating 4MB segments
+        */
+
+       pto = (pte_t*) (((unsigned long) pte) & 0x7ffffc00);
+              
+               __asm__ __volatile("    ic   0,2(%0)\n"
+                          "    ipte %1,%2\n"
+                          "    stc  0,2(%0)"
+                          : : "a" (pte), "a" (pto), "a" (addr): "0");
+}

> I can't find a valid reason for which they do need the old pte
> value. The tlb should be a virtual->physical mapping only, the pte isn't
> relevant at all with the TLB. however if they really need both old pte
> address and the virtual address of the page, they can trivially pass the
> parameters to the other CPUs acquring a spinlock and using some global
> variable exactly as IA32 does to avoid flushing the whole TLB on the other
> CPUs in the flush_tlb_page case.
> 
> >Obviously their work-around
> >       flush_tlb_page()
> >       set_pte()
> >is wrong as well, and it breaks all other architectures :-/
> 
> I bet it breaks s390 too.
> 

Of course :-)

> The other filemap_sync race with threads that Kanoj was talking about is
> very less severe since it can't make the machine unstable, but it can only
> forgot to write some bit using strange userspace app design (only _data_
> corruption can happen to the shared mmaping of the patological app).

Yes. 
Can we ignore the munmap+access case?
I'd say that if 2 threads race with munmap+access, then the behaviour is
undefined.
Tlb flushes are expensive, I'd like to avoid the second tlb flush as in
Kanoj's patch.

--
	Manfred

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  reply	other threads:[~2000-04-11 17:45 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2000-04-08 20:06 Manfred Spraul
2000-04-08 21:11 ` Kanoj Sarcar
2000-04-08 22:46   ` Manfred Spraul
2000-04-08 23:31     ` Kanoj Sarcar
2000-04-08 23:37       ` Alan Cox
2000-04-08 23:54         ` Kanoj Sarcar
2000-04-09  9:10         ` Manfred Spraul
2000-04-09  9:19           ` David S. Miller
2000-04-10 22:21         ` Stephen C. Tweedie
2000-04-10 23:12           ` David S. Miller
2000-04-11  9:14             ` Stephen C. Tweedie
2000-04-11 14:41               ` Manfred Spraul
2000-04-11 16:40                 ` Andrea Arcangeli
2000-04-11 17:45                   ` Manfred Spraul [this message]
2000-04-11 18:14                     ` Kanoj Sarcar
2000-04-12 10:02                     ` Jamie Lokier
2000-04-11 11:56           ` Alan Cox
2000-04-08 23:44   ` David S. Miller
2000-04-09  0:20     ` Kanoj Sarcar

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