From: Yin Fengwei <fengwei.yin@intel.com>
To: Matthew Wilcox <willy@infradead.org>,
Dave Hansen <dave.hansen@intel.com>
Cc: syzbot <syzbot+55cc72f8cc3a549119df@syzkaller.appspotmail.com>,
<akpm@linux-foundation.org>, <linux-kernel@vger.kernel.org>,
<linux-mm@kvack.org>, <syzkaller-bugs@googlegroups.com>,
Yin Fengwei <fengwei.yin@intel.com>
Subject: Re: [syzbot] [mm?] BUG: Bad page map (7)
Date: Tue, 19 Sep 2023 09:11:45 +0800 [thread overview]
Message-ID: <381e4ccd-47ee-955b-f7af-fe192bea0cd4@intel.com> (raw)
In-Reply-To: <97e59c09-30c8-038a-a6f9-3d862a0d3ede@intel.com>
Hi Matthew,
On 9/14/23 15:33, Yin Fengwei wrote:
> Hi Matthew,
>
> On 9/12/23 12:59, Matthew Wilcox wrote:
>> On Mon, Sep 11, 2023 at 01:22:51PM -0700, Dave Hansen wrote:
>>> On 9/11/23 12:12, Matthew Wilcox wrote:
>>>> On Mon, Sep 11, 2023 at 09:55:37AM -0700, Dave Hansen wrote:
>>>>> On 9/11/23 09:44, Matthew Wilcox wrote:
>>>>>> After fixing your two typos, this assembles to 176 bytes more code than
>>>>>> my version. Not sure that's great.
>>>>> Maybe I'm a fool, but 176 bytes of text bloat isn't scaring me off too
>>>>> much. I'd much rather have that than another window into x86 goofiness
>>>>> to maintain.
>>>>>
>>>>> Does that 176 bytes translate into meaningful performance, or is it just
>>>>> a bunch of register bit twiddling that the CPU will sail through?
>>>> I'm ... not sure how to tell. It's 1120 bytes vs 944 bytes and crawling
>>>> through that much x86 assembly isn't my idea of a great time. I can
>>>> send you objdump -dr for all three options if you like? Maybe there's
>>>> a quick way to compare them that I've never known about.
>>>
>>> Working patches would be great if you're got 'em handy, plus your
>>> .config and generally what compiler you're on.
>>
>> gcc (Debian 13.2.0-2) 13.2.0
>>
>> I don't think there's anything particularly strange about my .config
>>
>> If you compile this patch as-is, you'll get your preferred code.
>> Remove the #define DH and you get mine.
>>
>> I would say that 176 bytes is 3 cachelines of I$, which isn't free,
>> even if all the insns in it can be executed while the CPU is waiting
>> for cache misses. This ought to be a pretty tight loop anyway; we're
>> just filling in adjacent PTEs. There may not be many spare cycles
>> for "free" uops to execute.
>>
>> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
>> index d6ad98ca1288..c9781b8b14af 100644
>> --- a/arch/x86/include/asm/pgtable.h
>> +++ b/arch/x86/include/asm/pgtable.h
>> @@ -955,6 +955,14 @@ static inline int pte_same(pte_t a, pte_t b)
>> return a.pte == b.pte;
>> }
>>
>> +static inline pte_t pte_next(pte_t pte)
>> +{
>> + if (__pte_needs_invert(pte_val(pte)))
>> + return __pte(pte_val(pte) - (1UL << PFN_PTE_SHIFT));
>> + return __pte(pte_val(pte) + (1UL << PFN_PTE_SHIFT));
>> +}
>> +#define pte_next pte_next
>> +
>> static inline int pte_present(pte_t a)
>> {
>> return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
>> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
>> index 1fba072b3dac..25333cf3c865 100644
>> --- a/include/linux/pgtable.h
>> +++ b/include/linux/pgtable.h
>> @@ -205,6 +205,10 @@ static inline int pmd_young(pmd_t pmd)
>> #define arch_flush_lazy_mmu_mode() do {} while (0)
>> #endif
>>
>> +#ifndef pte_next
>> +#define pte_next(pte) ((pte) + (1UL << PFN_PTE_SHIFT))
>> +#endif
>> +
>> #ifndef set_ptes
>> /**
>> * set_ptes - Map consecutive pages to a contiguous range of addresses.
>> @@ -223,6 +227,11 @@ static inline int pmd_young(pmd_t pmd)
>> static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
>> pte_t *ptep, pte_t pte, unsigned int nr)
>> {
>> +#define DH
>> +#ifdef DH
>> + pgprot_t prot = pte_pgprot(pte);
>> + unsigned long pfn = pte_pfn(pte);
>> +#endif
>> page_table_check_ptes_set(mm, ptep, pte, nr);
>>
>> arch_enter_lazy_mmu_mode();
>> @@ -231,7 +240,12 @@ static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
>> if (--nr == 0)
>> break;
>> ptep++;
>> - pte = __pte(pte_val(pte) + (1UL << PFN_PTE_SHIFT));
>> +#ifdef DH
>> + pfn++;
>> + pte = pfn_pte(pfn, prot);
>> +#else
>> + pte = pte_next(pte);
>> +#endif
>> }
>> arch_leave_lazy_mmu_mode();
>> }
>
> I checked the commit message of 6b28baca9b1f0d4a42b865da7a05b1c81424bd5c:
> The invert is done by pte/pmd_modify and pfn/pmd/pud_pte for PROTNONE and
> pte/pmd/pud_pfn undo it.
>
> This assume that no code path touches the PFN part of a PTE directly
> without using these primitives.
>
> So maybe we should always use these APIs even we make x86 specific set_ptes()?
>
> I will find a test machine to measure the performance difference of these two
> versions by using xfs + will-it-scale. Will keep you guys updated.
I'd like to move this bug fixing forward. Based on the test result here:
https://lore.kernel.org/linux-mm/124631ab-eb4c-6584-12d4-f3c91e69c873@intel.com/
There is very small performance delta between your version and Dave's.
What do you think if we propose to merge Dave's version? Or do I need collect
more data? Thanks.
Regards
Yin, Fengwei
>
>
> Regards
> Yin, Fengwei
next prev parent reply other threads:[~2023-09-19 1:12 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-09 17:12 syzbot
2023-09-10 3:02 ` Matthew Wilcox
2023-09-10 3:29 ` syzbot
2023-09-10 3:40 ` Yin, Fengwei
2023-09-11 7:24 ` Yin Fengwei
2023-09-11 7:32 ` Yin Fengwei
2023-09-11 7:12 ` Yin Fengwei
2023-09-11 7:48 ` syzbot
2023-09-11 13:26 ` Matthew Wilcox
2023-09-11 14:00 ` syzbot
2023-09-11 15:34 ` Dave Hansen
2023-09-11 16:44 ` Matthew Wilcox
2023-09-11 16:55 ` Dave Hansen
2023-09-11 19:12 ` Matthew Wilcox
2023-09-11 20:22 ` Dave Hansen
2023-09-12 4:59 ` Matthew Wilcox
2023-09-12 16:07 ` Dave Hansen
2023-09-12 18:01 ` Dave Hansen
2023-09-14 7:33 ` Yin Fengwei
2023-09-14 8:37 ` Yin Fengwei
2023-09-19 1:11 ` Yin Fengwei [this message]
2023-09-19 16:11 ` Dave Hansen
2023-09-20 1:29 ` Yin Fengwei
2023-09-20 1:47 ` Matthew Wilcox
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