From: Bharata B Rao <bharata@amd.com>
To: Balbir Singh <balbirs@nvidia.com>,
linux-kernel@vger.kernel.org, linux-mm@kvack.org
Cc: Dave Hansen <dave.hansen@linux.intel.com>,
luto@kernel.org, peterz@infradead.org, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com,
nikunj@amd.com, kees@kernel.org, alexander.deucher@amd.com
Subject: Re: AMD GPU driver load hitting BUG_ON in sync_global_pgds_l5()
Date: Tue, 22 Apr 2025 13:58:39 +0530 [thread overview]
Message-ID: <37775bf2-d571-434c-8670-827631e2eb12@amd.com> (raw)
In-Reply-To: <ad725f4b-6e45-42e4-ba6d-919534bc99a4@nvidia.com>
On 22-Apr-25 12:44 PM, Balbir Singh wrote:
> On 4/22/25 16:34, Bharata B Rao wrote:
>
> Could you please confirm if this is a new issue? Sounds like your hitting it on 6.8.12+?
> I've never tested this on a system with 5 levels of page tables, but with 5 levels you get
> 52 bits of VA and you'll need to look at the KASLR logic (max_pfn + padding) to see where
> your ranges are getting assigned.
I haven't been able to test this on latest upstream. Will get back on
this as it can take considerable time to recreate.
Same or similar-look bugs have been discussed earlier too:
https://gitlab.freedesktop.org/drm/amd/-/issues/3244
Disabling 5 level tables seemed to have solved the issue though.
>
> I'd start by dumping the kaslr_regions array.
Sure, Thanks.
Regards,
Bharata.
next prev parent reply other threads:[~2025-04-22 8:28 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-22 6:34 Bharata B Rao
2025-04-22 7:14 ` Balbir Singh
2025-04-22 8:28 ` Bharata B Rao [this message]
2025-04-23 6:40 ` Bharata B Rao
2025-04-22 15:13 ` Dave Hansen
2025-04-23 9:30 ` Bharata B Rao
2025-04-23 16:01 ` Dave Hansen
2025-04-24 12:54 ` Bharata B Rao
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