From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pd0-f173.google.com (mail-pd0-f173.google.com [209.85.192.173]) by kanga.kvack.org (Postfix) with ESMTP id EF3DF28001C for ; Fri, 31 Oct 2014 03:54:24 -0400 (EDT) Received: by mail-pd0-f173.google.com with SMTP id v10so6821268pde.32 for ; Fri, 31 Oct 2014 00:54:24 -0700 (PDT) Received: from cnbjrel01.sonyericsson.com (cnbjrel01.sonyericsson.com. [219.141.167.165]) by mx.google.com with ESMTPS id kz15si5617891pab.192.2014.10.31.00.54.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 31 Oct 2014 00:54:23 -0700 (PDT) From: "Wang, Yalin" Date: Fri, 31 Oct 2014 15:54:16 +0800 Subject: RE: [RFC V6 2/3] add CONFIG_HAVE_ARCH_BITREVERSE to support rbit instruction Message-ID: <35FD53F367049845BC99AC72306C23D103E010D1827D@CNBJMBX05.corpusers.net> References: <1414392371.8884.2.camel@perches.com> <35FD53F367049845BC99AC72306C23D103E010D1825F@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18260@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18261@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18264@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18265@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18266@CNBJMBX05.corpusers.net> <20141030120127.GC32589@arm.com> <20141030135749.GE32589@arm.com> <35FD53F367049845BC99AC72306C23D103E010D18272@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18273@CNBJMBX05.corpusers.net> In-Reply-To: <35FD53F367049845BC99AC72306C23D103E010D18273@CNBJMBX05.corpusers.net> Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: owner-linux-mm@kvack.org List-ID: To: 'Will Deacon' , 'Ard Biesheuvel' Cc: 'Russell King - ARM Linux' , "'linux-kernel@vger.kernel.org'" , "'akinobu.mita@gmail.com'" , "'linux-mm@kvack.org'" , 'Joe Perches' , "'linux-arm-kernel@lists.infradead.org'" > From: Wang, Yalin > Subject: [RFC V6 2/3] add CONFIG_HAVE_ARCH_BITREVERSE to support rbit > instruction >=20 > This patch add bitrev.h file to support rbit instruction, so that we can = do > bitrev operation by hardware. > Signed-off-by: Yalin Wang > --- > arch/arm/Kconfig | 1 + > arch/arm/include/asm/bitrev.h | 21 +++++++++++++++++++++ > 2 files changed, 22 insertions(+) > create mode 100644 arch/arm/include/asm/bitrev.h >=20 > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 89c4b5c..be92b3b > 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -28,6 +28,7 @@ config ARM > select HANDLE_DOMAIN_IRQ > select HARDIRQS_SW_RESEND > select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT) > + select HAVE_ARCH_BITREVERSE if (CPU_V7M || CPU_V7) > select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL > select HAVE_ARCH_KGDB > select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) diff --git > a/arch/arm/include/asm/bitrev.h b/arch/arm/include/asm/bitrev.h new file > mode 100644 index 0000000..e9b2571 > --- /dev/null > +++ b/arch/arm/include/asm/bitrev.h > @@ -0,0 +1,21 @@ > +#ifndef __ASM_ARM_BITREV_H > +#define __ASM_ARM_BITREV_H > + > +static __always_inline __attribute_const__ u32 __arch_bitrev32(u32 x) { > + __asm__ ("rbit %0, %1" : "=3Dr" (x) : "r" (x)); > + return x; > +} > + > +static __always_inline __attribute_const__ u16 __arch_bitrev16(u16 x) { > + return __arch_bitrev32((u32)x) >> 16; > +} > + > +static __always_inline __attribute_const__ u8 __arch_bitrev8(u8 x) { > + return __arch_bitrev32((u32)x) >> 24; > +} > + > +#endif > + > -- > 2.1.1 Wrong title, please ignore this one , I have resend another [RFC V6 2/3] . Thanks -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org