From: Celeste Liu <uwu@coelacanthus.name>
To: "Björn Töpel" <bjorn@kernel.org>,
"Oleg Nesterov" <oleg@redhat.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Eric Biederman" <ebiederm@xmission.com>,
"Kees Cook" <kees@kernel.org>
Cc: Alexandre Ghiti <alex@ghiti.fr>,
"Dmitry V. Levin" <ldv@strace.io>,
Andrea Bolognani <abologna@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>, Ron Economos <re@w6rz.net>,
Felix Yan <felixonmars@archlinux.org>,
Ruizhe Pan <c141028@gmail.com>,
Shiqi Zhang <shiqi@isrc.iscas.ac.cn>, Guo Ren <guoren@kernel.org>,
Yao Zi <ziyao@disroot.org>, Han Gao <gaohan@iscas.ac.cn>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-mm@kvack.org, stable@vger.kernel.org
Subject: Re: [PATCH] riscv/ptrace: add new regset to get original a0 register
Date: Tue, 3 Dec 2024 17:33:17 +0800 [thread overview]
Message-ID: <31d48f53-eaf0-445e-b9e3-7c56070ff6ad@coelacanthus.name> (raw)
In-Reply-To: <87v7w22ip6.fsf@all.your.base.are.belong.to.us>
On 2024-12-02 23:44, Björn Töpel wrote:
> Thanks for working on this!
>
> Celeste Liu <uwu@coelacanthus.name> writes:
>
>> The orig_a0 is missing in struct user_regs_struct of riscv, and there is
>> no way to add it without breaking UAPI. (See Link tag below)
>>
>> Like NT_ARM_SYSTEM_CALL do, we add a new regset name NT_RISCV_ORIG_A0 to
>> access original a0 register from userspace via ptrace API.
>>
>> Link: https://lore.kernel.org/all/59505464-c84a-403d-972f-d4b2055eeaac@gmail.com/
>> Signed-off-by: Celeste Liu <uwu@coelacanthus.name>
>> ---
>> arch/riscv/kernel/ptrace.c | 33 +++++++++++++++++++++++++++++++++
>> include/uapi/linux/elf.h | 1 +
>> 2 files changed, 34 insertions(+)
>>
>> diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c
>> index ea67e9fb7a583683b922fe2c017ea61f3bc848db..faa46de9000376eb445a32d43a40210d7b846844 100644
>> --- a/arch/riscv/kernel/ptrace.c
>> +++ b/arch/riscv/kernel/ptrace.c
>> @@ -31,6 +31,7 @@ enum riscv_regset {
>> #ifdef CONFIG_RISCV_ISA_SUPM
>> REGSET_TAGGED_ADDR_CTRL,
>> #endif
>> + REGSET_ORIG_A0,
>> };
>>
>> static int riscv_gpr_get(struct task_struct *target,
>> @@ -184,6 +185,30 @@ static int tagged_addr_ctrl_set(struct task_struct *target,
>> }
>> #endif
>>
>> +static int riscv_orig_a0_get(struct task_struct *target,
>> + const struct user_regset *regset,
>> + struct membuf to)
>
> Use full 100 chars!
Linux code style prefer 80 limit.
>
>> +{
>> + return membuf_store(&to, task_pt_regs(target)->orig_a0);
>> +}
>> +
>> +static int riscv_orig_a0_set(struct task_struct *target,
>> + const struct user_regset *regset,
>> + unsigned int pos, unsigned int count,
>> + const void *kbuf, const void __user *ubuf)
>
> Dito!
>
>> +{
>> + int orig_a0 = task_pt_regs(target)->orig_a0;
>
> 64b regs on RV64.
Oh, my bad.
>
>> + int ret;
>> +
>> + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &orig_a0, 0, -1);
>> + if (ret)
>> + return ret;
>> +
>> + task_pt_regs(target)->orig_a0 = orig_a0;
>> + return ret;
>> +}
>> +
>> +
>
> Multiple blanks.
>
>> static const struct user_regset riscv_user_regset[] = {
>> [REGSET_X] = {
>> .core_note_type = NT_PRSTATUS,
>> @@ -224,6 +249,14 @@ static const struct user_regset riscv_user_regset[] = {
>> .set = tagged_addr_ctrl_set,
>> },
>> #endif
>> + [REGSET_ORIG_A0] = {
>> + .core_note_type = NT_RISCV_ORIG_A0,
>> + .n = 1,
>> + .size = sizeof(elf_greg_t),
>> + .align = sizeof(elf_greg_t),
>
> ...and sizeof(elf_greg_t) is 64b in RV64 -- mismatch above.
v2 has been sent.
>
>
> Björn
next prev parent reply other threads:[~2024-12-03 9:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-30 21:47 Celeste Liu
2024-12-02 15:44 ` Björn Töpel
2024-12-03 9:33 ` Celeste Liu [this message]
2024-12-03 11:23 ` Björn Töpel
2024-12-03 5:37 ` Charlie Jenkins
2024-12-03 9:41 ` Celeste Liu
2024-12-03 12:19 ` Dmitry V. Levin
2024-12-03 18:45 ` Charlie Jenkins
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