From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20DDDC433E0 for ; Mon, 13 Jul 2020 10:08:25 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id BF20E20758 for ; Mon, 13 Jul 2020 10:08:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BF20E20758 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 170B08D0002; Mon, 13 Jul 2020 06:08:24 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 121E98D0001; Mon, 13 Jul 2020 06:08:24 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 0374F8D0002; Mon, 13 Jul 2020 06:08:23 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0139.hostedemail.com [216.40.44.139]) by kanga.kvack.org (Postfix) with ESMTP id DF25C8D0001 for ; Mon, 13 Jul 2020 06:08:23 -0400 (EDT) Received: from smtpin24.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id 769F2181AC217 for ; Mon, 13 Jul 2020 10:08:23 +0000 (UTC) X-FDA: 77032627686.24.anger96_4807c8e26ee7 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin24.hostedemail.com (Postfix) with ESMTP id 4DD5D1A4A0 for ; Mon, 13 Jul 2020 10:08:23 +0000 (UTC) X-HE-Tag: anger96_4807c8e26ee7 X-Filterd-Recvd-Size: 3574 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf39.hostedemail.com (Postfix) with ESMTP for ; Mon, 13 Jul 2020 10:08:22 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D1D781FB; Mon, 13 Jul 2020 03:08:21 -0700 (PDT) Received: from [192.168.1.84] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 18D783F7D8; Mon, 13 Jul 2020 03:08:19 -0700 (PDT) From: Steven Price Subject: Re: [PATCH v6 02/26] arm64: mte: CPU feature detection and initial sysreg configuration To: Catalin Marinas , linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org, Suzuki K Poulose , Szabolcs Nagy , Andrey Konovalov , Kevin Brodsky , Peter Collingbourne , linux-mm@kvack.org, Andrew Morton , Vincenzo Frascino , Will Deacon , Dave P Martin References: <20200703153718.16973-1-catalin.marinas@arm.com> <20200703153718.16973-3-catalin.marinas@arm.com> Message-ID: <2fb4b560-fb2f-7689-05f7-d908b55cd1eb@arm.com> Date: Mon, 13 Jul 2020 11:08:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200703153718.16973-3-catalin.marinas@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit X-Rspamd-Queue-Id: 4DD5D1A4A0 X-Spamd-Result: default: False [0.00 / 100.00] X-Rspamd-Server: rspam02 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 03/07/2020 16:36, Catalin Marinas wrote: > From: Vincenzo Frascino > > Add the cpufeature and hwcap entries to detect the presence of MTE on > the boot CPUs (primary and secondary). Any late secondary CPU not > supporting the feature, if detected during boot, will be parked. > > In addition, add the minimum SCTLR_EL1 and HCR_EL2 bits for enabling > MTE. Without subsequent setting of MAIR, these bits do not have an > effect on tag checking. > > Signed-off-by: Vincenzo Frascino > Co-developed-by: Catalin Marinas > Signed-off-by: Catalin Marinas > Cc: Will Deacon > Cc: Suzuki K Poulose This commit causes the feature bit to be exposed to a guest, but we don't at this point have any way of handling a guest which attempts to use MTE. This is 'fixed' by the first patch of my KVM MTE series[1], but perhaps the chunk modifying arch/arm64/kvm/sys_regs.c (see below) should be included here instead? That way we hide the feature until we're ready for a guest with MTE support. Steve [1] https://lore.kernel.org/r/20200713100102.53664-2-steven.price@arm.com ----8<---- diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index baf5ce9225ce..5ca974c93bd4 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1104,6 +1104,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, if (!vcpu_has_sve(vcpu)) val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); val &= ~(0xfUL << ID_AA64PFR0_AMU_SHIFT); + } else if (id == SYS_ID_AA64PFR1_EL1) { + val &= ~(0xfUL << ID_AA64PFR1_MTE_SHIFT); } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) { val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) | (0xfUL << ID_AA64ISAR1_API_SHIFT) |