Re: [PATCH] tlb: hugetlb: Add arm64 contiguous hint awareness

[Steve Capper <steve.capper@arm.com>]

On 24/03/2022 14:33, Peter Zijlstra wrote:
> On Wed, Mar 23, 2022 at 04:52:18PM +0000, Steve Capper wrote:
> 
>> +#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address)	\
>> +	do {							\
>> +		unsigned long _sz = huge_page_size(h);		\
>> +		if (_sz == CONT_PTE_SIZE)			\
>> +			tlb_flush_pte_range(tlb, address, _sz);	\
>> +		else if (_sz == PMD_SIZE)			\
>> +			tlb_flush_pmd_range(tlb, address, _sz);	\
>> +		else if (_sz == CONT_PMD_SIZE)			\
>> +			tlb_flush_pmd_range(tlb, address, _sz);	\
>> +		else if (_sz == PUD_SIZE)			\
>> +			tlb_flush_pud_range(tlb, address, _sz);	\
>> +		__tlb_remove_tlb_entry(tlb, ptep, address);	\
>> +	} while (0)
> 
> 
> It occurs to me that perhaps this can be written like:
> 
> 	unsigned long _sz = huge_page_size(h);
> 	if (_sz >= P4D_SIZE)
> 		tlb_flush_p4d_range(tlb, address, _sz);
> 	else if (_sz >= PUD_SIZE)
> 		tlb_flush_pud_range(tlb, address, _sz);
> 	else if (_sz >= PMD_SIZE)
> 		tlb_flush_pmd_range(tlb, address, _sz);
> 	else
> 		tlb_flush_pte_range(tlb, address, _sz);
> 	__tlb_remove_tlb_entry(tlb, ptep, address);
> 
> And then it can still be generic..

Thanks Peter,
My concern with that would be the CONT_PMD_SIZE case would result in a 
call to tlb_flush_pte_range rather than tlb_flush_pmd_range causing some 
of the level parameters to be different.

Would that cause an issue?

Cheers,
-- 
Steve