From: Dave Hansen <dave.hansen@intel.com>
To: Ashok Raj <ashok.raj@intel.com>
Cc: Jason Gunthorpe <jgg@nvidia.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Jacob Pan <jacob.jun.pan@intel.com>,
"Kirill A. Shutemov" <kirill@shutemov.name>,
Ashok Raj <ashok_raj@linux.intel.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
x86@kernel.org, Kostya Serebryany <kcc@google.com>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Alexander Potapenko <glider@google.com>,
Taras Madan <tarasmadan@google.com>,
Dmitry Vyukov <dvyukov@google.com>,
"H . J . Lu" <hjl.tools@gmail.com>,
Andi Kleen <ak@linux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
Joerg Roedel <joro@8bytes.org>
Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling
Date: Fri, 23 Sep 2022 09:23:40 -0700 [thread overview]
Message-ID: <21e4a613-cf21-6d90-17e7-91aa960bdafa@intel.com> (raw)
In-Reply-To: <Yy3UWTLdIldKIfgu@araj-MOBL2.amr.corp.intel.com>
On 9/23/22 08:44, Ashok Raj wrote:
>> But, the point that Kirill and I were getting at is still that devices
>> *have* a role to play here. The idea that this can be hidden at the
>> IOMMU layer is pure fantasy. Right?
> If you *can't* send tagged memory to the device, what is the
> role the device need to play?
>
> For now you can only send proper VA's that are canonical.
Today, yes, you have to keep tagged addresses away from devices. They
must be sequestered in a place that only the CPU can find them.
The observation that Kirill and I had is that there are thing that are
done solely on the device today -- like accessing a translated address
twice -- without IOMMU involvement. We were trying to figure out how
that would work in the future once tagged addresses are exposed to
devices and they implement all the new PCI magic.
After our private chat, I think the answer is that devices *have* a role
to play. Device-side logic must know how to untag memory before asking
for translation or even *deciding* to ask for address translation. But,
hopefully, the communicating that untagging information to the device
will be done in a device-agnostic, standardized way, just how PASIDs or
ATS are handled today.
next prev parent reply other threads:[~2022-09-23 16:23 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 1:00 Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 01/11] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 02/11] x86: CPUID and CR3/CR4 flags for Linear Address Masking Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 03/11] mm: Pass down mm_struct to untagged_addr() Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 04/11] x86/mm: Handle LAM on context switch Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 05/11] x86/uaccess: Provide untagged_addr() and remove tags before address check Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 06/11] x86/mm: Provide arch_prctl() interface for LAM Kirill A. Shutemov
2022-08-30 1:01 ` [PATCHv8 07/11] x86: Expose untagging mask in /proc/$PID/arch_status Kirill A. Shutemov
2022-08-30 1:01 ` [PATCHv8 08/11] selftests/x86/lam: Add malloc and tag-bits test cases for linear-address masking Kirill A. Shutemov
2022-08-30 1:01 ` [PATCHv8 09/11] selftests/x86/lam: Add mmap and SYSCALL " Kirill A. Shutemov
2022-09-07 3:19 ` Robert Hoo
2022-09-09 11:24 ` Zhang, Weihong
2022-08-30 1:01 ` [PATCHv8 10/11] selftests/x86/lam: Add io_uring " Kirill A. Shutemov
2022-08-30 1:01 ` [PATCHv8 11/11] selftests/x86/lam: Add inherit " Kirill A. Shutemov
2022-09-01 17:45 ` [PATCHv8 00/11] Linear Address Masking enabling Ashok Raj
2022-09-04 0:39 ` Kirill A. Shutemov
2022-09-09 16:08 ` Ashok Raj
2022-09-12 20:39 ` Jacob Pan
2022-09-12 21:41 ` Dave Hansen
2022-09-12 22:55 ` Jacob Pan
2022-09-13 0:06 ` Kirill A. Shutemov
2022-09-13 0:23 ` Ashok Raj
2022-09-12 22:49 ` Kirill A. Shutemov
2022-09-13 0:08 ` Jacob Pan
2022-09-13 0:18 ` Kirill A. Shutemov
2022-09-14 14:45 ` Kirill A. Shutemov
2022-09-14 15:11 ` Ashok Raj
2022-09-14 15:18 ` Kirill A. Shutemov
2022-09-14 15:31 ` Ashok Raj
2022-09-14 15:45 ` Kirill A. Shutemov
2022-09-14 23:51 ` Jacob Pan
2022-09-15 9:01 ` Kirill A. Shutemov
2022-09-15 17:28 ` Kirill A. Shutemov
2022-09-20 13:14 ` Jason Gunthorpe
2022-09-20 14:57 ` Ashok Raj
2022-09-20 16:06 ` Dave Hansen
2022-09-20 16:27 ` Jason Gunthorpe
2022-09-20 18:41 ` Jacob Pan
2022-09-20 18:50 ` Jason Gunthorpe
2022-09-20 20:44 ` Jacob Pan
2022-09-21 0:01 ` Jason Gunthorpe
2022-09-21 9:36 ` Tian, Kevin
2022-09-21 16:57 ` Dave Hansen
2022-09-21 17:08 ` Ashok Raj
2022-09-21 17:11 ` Dave Hansen
2022-09-21 17:29 ` Ashok Raj
2022-09-21 18:11 ` Jason Gunthorpe
2022-09-23 0:42 ` Kirill A. Shutemov
2022-09-23 5:27 ` Ashok Raj
2022-09-23 9:38 ` Kirill A. Shutemov
2022-09-23 11:46 ` Jason Gunthorpe
2022-09-23 14:18 ` Dave Hansen
2022-09-23 14:42 ` Jason Gunthorpe
2022-09-23 14:59 ` Ashok Raj
2022-09-23 15:28 ` Ashok Raj
2022-09-23 15:31 ` Dave Hansen
2022-09-23 15:44 ` Ashok Raj
2022-09-23 16:23 ` Dave Hansen [this message]
2022-09-23 16:44 ` Jason Gunthorpe
2022-09-04 1:00 ` Kirill A. Shutemov
2022-09-05 5:05 ` Bharata B Rao
2022-09-05 13:44 ` Kirill A. Shutemov
2022-09-05 14:30 ` Peter Zijlstra
2022-09-05 15:35 ` Kirill A. Shutemov
2022-09-05 15:46 ` Peter Zijlstra
2022-09-05 16:47 ` Kirill A. Shutemov
2022-09-06 8:39 ` Peter Zijlstra
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