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Wed, 8 Jun 2022 04:41:37 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4E1C85204E; Wed, 8 Jun 2022 04:41:37 +0000 (GMT) Received: from [9.43.53.124] (unknown [9.43.53.124]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id E1DF252050; Wed, 8 Jun 2022 04:41:30 +0000 (GMT) Message-ID: <21b95ac3-4b3c-3455-93c6-8257fcbff527@linux.ibm.com> Date: Wed, 8 Jun 2022 10:11:29 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: RFC: Memory Tiering Kernel Interfaces (v3) Content-Language: en-US To: Tim Chen , Jonathan Cameron , Ying Huang Cc: Wei Xu , Andrew Morton , Greg Thelen , Yang Shi , Davidlohr Bueso , Tim C Chen , Brice Goglin , Michal Hocko , Linux Kernel Mailing List , Hesham Almatary , Dave Hansen , Alistair Popple , Dan Williams , Feng Tang , Linux MM , Jagdish Gediya , Baolin Wang , David Rientjes References: <1281d918c07b05ac82aee290018ad08d212e0aaa.camel@intel.com> <20220530135043.00001e88@Huawei.com> From: Aneesh Kumar K V In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: v_hnSuXru5-wSsQvbeDNUH7gYzDTmtde X-Proofpoint-ORIG-GUID: SYNUJXIZhqU9pu86pYCOxFy7_gM2EE7O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-08_01,2022-06-07_02,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 adultscore=0 phishscore=0 mlxscore=0 suspectscore=0 mlxlogscore=999 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206080019 X-Stat-Signature: 4enwzcqyfgna7jhkhzd3serc6ip9dt3n X-Rspam-User: Authentication-Results: imf20.hostedemail.com; dkim=pass header.d=ibm.com header.s=pp1 header.b=KTQFE8GS; spf=pass (imf20.hostedemail.com: domain of aneesh.kumar@linux.ibm.com designates 148.163.158.5 as permitted sender) smtp.mailfrom=aneesh.kumar@linux.ibm.com; dmarc=pass (policy=none) header.from=ibm.com X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 999041C0051 X-HE-Tag: 1654663554-280117 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 6/8/22 12:55 AM, Tim Chen wrote: > On Mon, 2022-05-30 at 13:50 +0100, Jonathan Cameron wrote: >> >>> When discussed offline, Tim Chen pointed out that with the proposed >>> interface, it's unconvenient to know the position of a given memory tier >>> in all memory tiers. We must sort "rank" of all memory tiers to know >>> that. "possible" file can be used for that. Although "possible" file >>> can be generated with a shell script, it's more convenient to show it >>> directly. >>> >>> Another way to address the issue is to add memtierN/pos for each memory >>> tier as suggested by Tim. It's readonly and will show position of >>> "memtierN" in all memory tiers. It's even better to show the relative >>> postion to the default memory tier (DRAM with CPU). That is, the >>> position of DRAM memory tier is 0. >>> >>> Unlike memory tier device ID or rank, the position is relative and >>> dynamic. >> >> Hi, >> >> I'm unconvinced. This is better done with a shell script than >> by adding ABI we'll have to live with for ever.. >> >> I'm no good at shell scripting but this does the job >> grep "" tier*/rank | sort -n -k 2 -t : >> >> tier2/rank:50 >> tier0/rank:100 >> tier1/rank:200 >> tier3/rank:240 >> >> I'm sure someone more knowledgeable will do it in a simpler fashion still. >> >> > > You can argue that > > $ cat /sys/devices/system/cpu/cpu1/topology/core_siblings > f > $ cat /sys/devices/system/cpu/cpu1/topology/core_siblings_list > 0-3 > > provide exactly the same information and we should get rid of > core_siblings_list. I think core_siblings_list exists to make > it easier for a human, so he/she doesn't have to parse the mask, > or write a script to find out the ids of CPUs who are siblings. > > I think in the same spirit, having an interface to allow a > human to quickly see the hierachical relationship of tiers > relative to each other is helpful. > We can add that later if we find applications requiring this. I kind of have the feeling that we are adding too much based on possible ways memory tiers could be used in the future. For now we can look at doing bare minimum to address the current constraints and drive more user visible changes later based on application requirements. -aneesh