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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 26 Feb 2020 00:19:08 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01Q0J7EO62914758 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 26 Feb 2020 00:19:07 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9ECAD11C050; Wed, 26 Feb 2020 00:19:07 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EC63211C04A; Wed, 26 Feb 2020 00:19:06 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 26 Feb 2020 00:19:06 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 18A29A00F1; Wed, 26 Feb 2020 11:19:02 +1100 (AEDT) Subject: Re: [PATCH v3 03/27] powerpc: Map & release OpenCAPI LPC memory From: "Alastair D'Silva" To: Frederic Barrat Cc: "Aneesh Kumar K . V" , "Oliver O'Halloran" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Dan Williams , Vishal Verma , Dave Jiang , Ira Weiny , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?ISO-8859-1?Q?C=E9dric?= Le Goater , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org Date: Wed, 26 Feb 2020 11:19:05 +1100 In-Reply-To: <69991128-3cf1-a8ba-4d9f-9ff90f1783db@linux.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> <20200221032720.33893-4-alastair@au1.ibm.com> <69991128-3cf1-a8ba-4d9f-9ff90f1783db@linux.ibm.com> Organization: IBM Australia Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.34.3 (3.34.3-1.fc31) MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022600-0020-0000-0000-000003AD9382 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022600-0021-0000-0000-00002205ABB7 Message-Id: <20f0a729962c1fe58f34f500c2666b4516073508.camel@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-25_09:2020-02-25,2020-02-25 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 malwarescore=0 spamscore=0 suspectscore=2 mlxscore=0 bulkscore=0 phishscore=0 mlxlogscore=448 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002260000 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Tue, 2020-02-25 at 11:02 +0100, Frederic Barrat wrote: >=20 > Le 21/02/2020 =C3=A0 04:26, Alastair D'Silva a =C3=A9crit : > > From: Alastair D'Silva > >=20 > > This patch adds platform support to map & release LPC memory. > >=20 > > Signed-off-by: Alastair D'Silva > > --- > > arch/powerpc/include/asm/pnv-ocxl.h | 4 +++ > > arch/powerpc/platforms/powernv/ocxl.c | 43 > > +++++++++++++++++++++++++++ > > 2 files changed, 47 insertions(+) > >=20 > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h > > b/arch/powerpc/include/asm/pnv-ocxl.h > > index 7de82647e761..0b2a6707e555 100644 > > --- a/arch/powerpc/include/asm/pnv-ocxl.h > > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > > @@ -32,5 +32,9 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void > > *platform_data, int pe_handle) > > =20 > > extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > > extern void pnv_ocxl_free_xive_irq(u32 irq); > > +#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE > > +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); > > +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); > > +#endif >=20 > This breaks the compilation of the ocxl driver if > CONFIG_MEMORY_HOTPLUG=3Dn >=20 > Those functions still make sense even without memory hotplug, for=20 > example in the context of the implementation you had to access > opencapi=20 > LPC memory through mmap(). The #ifdef is really needed only around > the=20 > check_hotplug_memory_addressable() call. >=20 > Fred Hmm, we do still need sparsemem though. Let me think about his some more. >=20 >=20 > > #endif /* _ASM_PNV_OCXL_H */ > > diff --git a/arch/powerpc/platforms/powernv/ocxl.c > > b/arch/powerpc/platforms/powernv/ocxl.c > > index 8c65aacda9c8..f2edbcc67361 100644 > > --- a/arch/powerpc/platforms/powernv/ocxl.c > > +++ b/arch/powerpc/platforms/powernv/ocxl.c > > @@ -475,6 +475,49 @@ void pnv_ocxl_spa_release(void *platform_data) > > } > > EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release); > > =20 > > +#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE > > +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size) > > +{ > > + struct pci_controller *hose =3D pci_bus_to_host(pdev->bus); > > + struct pnv_phb *phb =3D hose->private_data; > > + u32 bdfn =3D pci_dev_id(pdev); > > + __be64 base_addr_be64; > > + u64 base_addr; > > + int rc; > > + > > + rc =3D opal_npu_mem_alloc(phb->opal_id, bdfn, size, > > &base_addr_be64); > > + if (rc) { > > + dev_warn(&pdev->dev, > > + "OPAL could not allocate LPC memory, rc=3D%d\n", > > rc); > > + return 0; > > + } > > + > > + base_addr =3D be64_to_cpu(base_addr_be64); > > + > > + rc =3D check_hotplug_memory_addressable(base_addr >> PAGE_SHIFT, > > + size >> PAGE_SHIFT); > > + if (rc) > > + return 0; > > + > > + return base_addr; > > +} > > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup); > > + > > +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev) > > +{ > > + struct pci_controller *hose =3D pci_bus_to_host(pdev->bus); > > + struct pnv_phb *phb =3D hose->private_data; > > + u32 bdfn =3D pci_dev_id(pdev); > > + int rc; > > + > > + rc =3D opal_npu_mem_release(phb->opal_id, bdfn); > > + if (rc) > > + dev_warn(&pdev->dev, > > + "OPAL reported rc=3D%d when releasing LPC > > memory\n", rc); > > +} > > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release); > > +#endif > > + > > int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int > > pe_handle) > > { > > struct spa_data *data =3D (struct spa_data *) platform_data; > >=20 --=20 Alastair D'Silva Open Source Developer Linux Technology Centre, IBM Australia mob: 0423 762 819