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J . Mercier" , Andrew Morton , David Hildenbrand , Mike Rapoport , Sumit Garg , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-mm@kvack.org Subject: [PATCH v2 01/10] dt-bindings: reserved-memory: Document Tegra VPR Date: Thu, 22 Jan 2026 17:10:00 +0100 Message-ID: <20260122161009.3865888-2-thierry.reding@kernel.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260122161009.3865888-1-thierry.reding@kernel.org> References: <20260122161009.3865888-1-thierry.reding@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: C415540006 X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: 4uasgif8x9ctgwmx51359xhfhdz1gd8s X-HE-Tag: 1769098219-115527 X-HE-Meta: U2FsdGVkX1+RItoLOPZD7whFPOvXb8jsAz0BjpBV69P9GOF9G6ZmIUCycu4/E79nZOzWwsyC0hxAytCaaqLk9ktrFRf3+aTmX93saTZZm39D2+9xT/wwNgF+7Txz+wKsRD8/MfCzqsSrMb1dHiZ4eqPcUJp8F6MSdG7fVM+M8umOfbLM4r2LYQi8s1LJpV/yeLD1sOoXY/so0t43LSrxiCCmh6xK3Li8CG0rgcl27yb5JJud2Bp7PTlPvBqWCxzZJdnQpjQtUF3t+Vyv+7kvdqtgK2L6IGyNYcj6UMRPY8VC4UWwfgW3kkLroNzVL5Z+uIrybtCsRUcjsfngYKXz9X9Om8Y7I6yVKAIv8B/pvK3r4nr8t63EhUjo3gQAlCTYNGwmckaCVRU/hQxbb2e54GDELJXiOZgRps++A+W2Wfllj5r2PazA6D1srxkLzMX1LQY2QP38lgaeprj7S3eMtfUnio9TuN87z+UGX/tjwCTGJW7b7Cyj48AfT0CeY/FJz3hOj885M9n78fu+uheGWtaNB/uNvHp55hMi7BE50B9JzDdIp8WU6II1+4M9GWWBx6riU/FJvfnIWTDibsvpXikNIdIRuNYXnH6kPlBXjU8oFdAJRqvetlfB3aNPTC/E1lLhPuNYbnKxKS9ZnN0yZqdaAQO0Qx6TxV+tl3gFHTa6Y9xgMguKNRWHooyZjNGM83zG7nf2piNPzAnWamnSzQk3iPOahFu9JEEkE8OgG38I2xV9bde2CSKNV31PgWN6o9PRiCACfwn6Dos4slW8SfhFQGwQChUZt6vdVUoSeZFprD/P0Vxb8IF/ty8+a8Dcj5TeAsX2MD2O/NUOuuLjJqJOSiPhpK0XUl8W+cGeonCAOYsd2JkxLOdeMPIYEgDB+urhQYIFGnXm+uyn8NJPjbXPCZBn2BGmYs8ciAp/0Nz72LPrfvNoWvPWIMunriX+DPQwUx7tnrbZ2ZPWFm9 zCPhhxtS OD+IBmPI4NH8SF3YWjW2bEQBnOwYJhfNkQytstTHSXMq+soYSIvOcmeS/cnWQhsBZYLRal6SmtVrnt7OCZKVojURKM9lQnjxNWKACrjdgFNbjNr+qsEbV02xooFcn8iKk0stxCjC1cZ+9zf1pHkrzZXuz0dbyppvdQllLrJueLII7BIzO0sK7fa0k4BE8o+oTBzF3b5eOGcROfH1+PSXs/B97hC5UOSbsLP5e5P9sKWvnLfM2HRgWMj1eGsbxac2fj5lQv3L+oIvLGCDWqThhapBuF5MfdVADJ9t76bF2x0aVqFbcXH3Ar0DR/IEM24kYfUEPDIZaVnLAzcL6B/XQkv+nAljsR9iXi/7D5Uk+SuZbn7ubJfNW+ehImW5OMPPu04NW5H3hrQZgi+GeKe5SN7YcnFsc5xMw616s X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Thierry Reding The Video Protection Region (VPR) found on NVIDIA Tegra chips is a region of memory that is protected from CPU accesses. It is used to decode and play back DRM protected content. It is a standard reserved memory region that can exist in two forms: static VPR where the base address and size are fixed (uses the "reg" property to describe the memory) and a resizable VPR where only the size is known upfront and the OS can allocate it wherever it can be accomodated. Reviewed-by: Rob Herring (Arm) Signed-off-by: Thierry Reding --- .../nvidia,tegra-video-protection-region.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml new file mode 100644 index 000000000000..c13292a791bb --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra-video-protection-region.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Video Protection Region (VPR) + +maintainers: + - Thierry Reding + - Jon Hunter + +description: | + NVIDIA Tegra chips have long supported a mechanism to protect a single, + contiguous memory region from non-secure memory accesses. Typically this + region is used for decoding and playback of DRM protected content. Various + devices, such as the display controller and multimedia engines (video + decoder) can access this region in a secure way. Access from the CPU is + generally forbidden. + + Two variants exist for VPR: one is fixed in both the base address and size, + while the other is resizable. Fixed VPR can be described by just a "reg" + property specifying the base address and size, whereas the resizable VPR + is defined by a size/alignment pair of properties. For resizable VPR the + memory is reusable by the rest of the system when it's unused for VPR and + therefore the "reusable" property must be specified along with it. For a + fixed VPR, the memory is permanently protected, and therefore it's not + reusable and must also be marked as "no-map" to prevent any (including + speculative) accesses to it. + +allOf: + - $ref: reserved-memory.yaml + +properties: + compatible: + const: nvidia,tegra-video-protection-region + +dependencies: + size: [alignment, reusable] + alignment: [size, reusable] + reusable: [alignment, size] + + reg: [no-map] + no-map: [reg] + +unevaluatedProperties: false + +oneOf: + - required: + - compatible + - reg + + - required: + - compatible + - size -- 2.52.0