* [PATCH v3 0/3] RISC-V: add percpu.h to include/asm
@ 2025-12-16 1:47 Yunhui Cui
2025-12-16 1:47 ` [PATCH v3 1/3] riscv: remove irqflags.h inclusion in asm/bitops.h Yunhui Cui
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Yunhui Cui @ 2025-12-16 1:47 UTC (permalink / raw)
To: aou, alex, andii, andybnac, apatel, ast, ben.dooks, bjorn, bpf,
charlie, cl, conor.dooley, cuiyunhui, cyrilbur, daniel, debug,
dennis, eddyz87, haoluo, john.fastabend, jolsa, kpsingh,
linux-kernel, linux-mm, linux-riscv, linux, martin.lau, palmer,
pjw, puranjay, pulehui, ruanjinjie, rkrcmar, samuel.holland, sdf,
song, tglx, tj, thuth, yonghong.song, yury.norov, zong.li
v1->v2:
1. Support percpu add/and/or operations for non-ZABHA
2. Implement optimization: store percpu offset in thread_info
v2->v3:
1. Fix this_cpu_cmpxchg128() compilation issue when
system_has_cmpxchg128() is unsupported
2. Fix sparse warning issues
Yunhui Cui (3):
riscv: remove irqflags.h inclusion in asm/bitops.h
riscv: introduce percpu.h into include/asm
riscv: store percpu offset into thread_info
arch/riscv/include/asm/asm.h | 6 +-
arch/riscv/include/asm/bitops.h | 1 -
arch/riscv/include/asm/percpu.h | 248 +++++++++++++++++++++++++++
arch/riscv/include/asm/switch_to.h | 8 +
arch/riscv/include/asm/thread_info.h | 5 +-
arch/riscv/kernel/asm-offsets.c | 1 +
arch/riscv/kernel/smpboot.c | 7 +
arch/riscv/net/bpf_jit_comp64.c | 9 +-
8 files changed, 269 insertions(+), 16 deletions(-)
create mode 100644 arch/riscv/include/asm/percpu.h
--
2.39.5
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 1/3] riscv: remove irqflags.h inclusion in asm/bitops.h
2025-12-16 1:47 [PATCH v3 0/3] RISC-V: add percpu.h to include/asm Yunhui Cui
@ 2025-12-16 1:47 ` Yunhui Cui
2025-12-16 17:39 ` Yury Norov
2025-12-16 1:47 ` [PATCH v3 2/3] riscv: introduce percpu.h into include/asm Yunhui Cui
2025-12-16 1:47 ` [PATCH v3 3/3] riscv: store percpu offset into thread_info Yunhui Cui
2 siblings, 1 reply; 7+ messages in thread
From: Yunhui Cui @ 2025-12-16 1:47 UTC (permalink / raw)
To: aou, alex, andii, andybnac, apatel, ast, ben.dooks, bjorn, bpf,
charlie, cl, conor.dooley, cuiyunhui, cyrilbur, daniel, debug,
dennis, eddyz87, haoluo, john.fastabend, jolsa, kpsingh,
linux-kernel, linux-mm, linux-riscv, linux, martin.lau, palmer,
pjw, puranjay, pulehui, ruanjinjie, rkrcmar, samuel.holland, sdf,
song, tglx, tj, thuth, yonghong.song, yury.norov, zong.li
The arch/riscv/include/asm/bitops.h does not functionally require
including /linux/irqflags.h. Additionally, adding
arch/riscv/include/asm/percpu.h causes a circular inclusion:
kernel/bounds.c
->include/linux/log2.h
->include/linux/bitops.h
->arch/riscv/include/asm/bitops.h
->include/linux/irqflags.h
->include/linux/find.h
->return val ? __ffs(val) : size;
->arch/riscv/include/asm/bitops.h
The compilation log is as follows:
CC kernel/bounds.s
In file included from ./include/linux/bitmap.h:11,
from ./include/linux/cpumask.h:12,
from ./arch/riscv/include/asm/processor.h:55,
from ./arch/riscv/include/asm/thread_info.h:42,
from ./include/linux/thread_info.h:60,
from ./include/asm-generic/preempt.h:5,
from ./arch/riscv/include/generated/asm/preempt.h:1,
from ./include/linux/preempt.h:79,
from ./arch/riscv/include/asm/percpu.h:8,
from ./include/linux/irqflags.h:19,
from ./arch/riscv/include/asm/bitops.h:14,
from ./include/linux/bitops.h:68,
from ./include/linux/log2.h:12,
from kernel/bounds.c:13:
./include/linux/find.h: In function 'find_next_bit':
./include/linux/find.h:66:30: error: implicit declaration of function '__ffs' [-Wimplicit-function-declaration]
66 | return val ? __ffs(val) : size;
| ^~~~~
Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
---
arch/riscv/include/asm/bitops.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
index 238092125c118..3c1a15be54d80 100644
--- a/arch/riscv/include/asm/bitops.h
+++ b/arch/riscv/include/asm/bitops.h
@@ -11,7 +11,6 @@
#endif /* _LINUX_BITOPS_H */
#include <linux/compiler.h>
-#include <linux/irqflags.h>
#include <asm/barrier.h>
#include <asm/bitsperlong.h>
--
2.39.5
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 2/3] riscv: introduce percpu.h into include/asm
2025-12-16 1:47 [PATCH v3 0/3] RISC-V: add percpu.h to include/asm Yunhui Cui
2025-12-16 1:47 ` [PATCH v3 1/3] riscv: remove irqflags.h inclusion in asm/bitops.h Yunhui Cui
@ 2025-12-16 1:47 ` Yunhui Cui
2025-12-20 14:45 ` kernel test robot
2025-12-20 16:31 ` kernel test robot
2025-12-16 1:47 ` [PATCH v3 3/3] riscv: store percpu offset into thread_info Yunhui Cui
2 siblings, 2 replies; 7+ messages in thread
From: Yunhui Cui @ 2025-12-16 1:47 UTC (permalink / raw)
To: aou, alex, andii, andybnac, apatel, ast, ben.dooks, bjorn, bpf,
charlie, cl, conor.dooley, cuiyunhui, cyrilbur, daniel, debug,
dennis, eddyz87, haoluo, john.fastabend, jolsa, kpsingh,
linux-kernel, linux-mm, linux-riscv, linux, martin.lau, palmer,
pjw, puranjay, pulehui, ruanjinjie, rkrcmar, samuel.holland, sdf,
song, tglx, tj, thuth, yonghong.song, yury.norov, zong.li
Current percpu operations rely on generic implementations, where
raw_local_irq_save() introduces substantial overhead. Optimization
is achieved through atomic operations and preemption disabling.
Currently, since RISC-V does not support lr/sc.b/h, when ZABHA is
not supported, lr/sc.w needs to be used instead, which requires
some additional mask operations.
Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
---
arch/riscv/include/asm/percpu.h | 244 ++++++++++++++++++++++++++++++++
1 file changed, 244 insertions(+)
create mode 100644 arch/riscv/include/asm/percpu.h
diff --git a/arch/riscv/include/asm/percpu.h b/arch/riscv/include/asm/percpu.h
new file mode 100644
index 0000000000000..c5bacf6d864ee
--- /dev/null
+++ b/arch/riscv/include/asm/percpu.h
@@ -0,0 +1,244 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __ASM_PERCPU_H
+#define __ASM_PERCPU_H
+
+#include <linux/preempt.h>
+
+#include <asm/alternative-macros.h>
+#include <asm/cpufeature-macros.h>
+#include <asm/hwcap.h>
+
+#define PERCPU_RW_OPS(sz) \
+static inline unsigned long __percpu_read_##sz(void *ptr) \
+{ \
+ return READ_ONCE(*(u##sz *)ptr); \
+} \
+ \
+static inline void __percpu_write_##sz(void *ptr, unsigned long val) \
+{ \
+ WRITE_ONCE(*(u##sz *)ptr, (u##sz)val); \
+}
+
+PERCPU_RW_OPS(8)
+PERCPU_RW_OPS(16)
+PERCPU_RW_OPS(32)
+PERCPU_RW_OPS(64)
+
+#define __PERCPU_AMO_OP_CASE(sfx, name, sz, amo_insn) \
+static inline void \
+__percpu_##name##_amo_case_##sz(void *ptr, unsigned long val) \
+{ \
+ asm volatile ( \
+ "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
+ : [ptr] "+A" (*(u##sz *)ptr) \
+ : [val] "r" ((u##sz)(val)) \
+ : "memory"); \
+}
+
+#define PERCPU_OP(name, amo_insn) \
+ __PERCPU_AMO_OP_CASE(.w, name, 32, amo_insn) \
+ __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
+
+PERCPU_OP(add, add)
+PERCPU_OP(andnot, and)
+PERCPU_OP(or, or)
+
+/*
+ * Currently, only this_cpu_add_return_xxx() requires a return value,
+ * and the PERCPU_RET_OP() does not account for other operations.
+ */
+#define __PERCPU_AMO_RET_OP_CASE(sfx, name, sz, amo_insn) \
+static inline u##sz \
+__percpu_##name##_return_amo_case_##sz(void *ptr, unsigned long val) \
+{ \
+ register u##sz ret; \
+ \
+ asm volatile ( \
+ "amo" #amo_insn #sfx " %[ret], %[val], %[ptr]" \
+ : [ptr] "+A" (*(u##sz *)ptr), [ret] "=r" (ret) \
+ : [val] "r" ((u##sz)(val)) \
+ : "memory"); \
+ \
+ return ret + val; \
+}
+
+#define PERCPU_RET_OP(name, amo_insn) \
+ __PERCPU_AMO_RET_OP_CASE(.w, name, 32, amo_insn) \
+ __PERCPU_AMO_RET_OP_CASE(.d, name, 64, amo_insn)
+
+PERCPU_RET_OP(add, add)
+
+#define PERCPU_8_16_GET_SHIFT(ptr) (((unsigned long)(ptr) & 0x3) * BITS_PER_BYTE)
+#define PERCPU_8_16_GET_MASK(sz) GENMASK((sz)-1, 0)
+#define PERCPU_8_16_GET_PTR32(ptr) ((u32 *)((unsigned long)(ptr) & ~0x3))
+
+#define PERCPU_8_16_OP(name, amo_insn, sz, sfx, val_type, new_val_expr, asm_op) \
+static inline void __percpu_##name##_amo_case_##sz(void *ptr, unsigned long val) \
+{ \
+ if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) && \
+ riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA)) { \
+ asm volatile ("amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
+ : [ptr] "+A"(*(val_type *)ptr) \
+ : [val] "r"((val_type)((new_val_expr) & PERCPU_8_16_GET_MASK(sz))) \
+ : "memory"); \
+ } else { \
+ u32 *ptr32 = PERCPU_8_16_GET_PTR32(ptr); \
+ const unsigned long shift = PERCPU_8_16_GET_SHIFT(ptr); \
+ const u32 mask = PERCPU_8_16_GET_MASK(sz) << shift; \
+ const val_type val_trunc = (val_type)((new_val_expr) \
+ & PERCPU_8_16_GET_MASK(sz)); \
+ u32 retx, rc; \
+ val_type new_val_type; \
+ \
+ asm volatile ( \
+ "0: lr.w %0, %2\n" \
+ "and %3, %0, %4\n" \
+ "srl %3, %3, %5\n" \
+ #asm_op " %3, %3, %6\n" \
+ "sll %3, %3, %5\n" \
+ "and %1, %0, %7\n" \
+ "or %1, %1, %3\n" \
+ "sc.w %1, %1, %2\n" \
+ "bnez %1, 0b\n" \
+ : "=&r"(retx), "=&r"(rc), "+A"(*ptr32), "=&r"(new_val_type) \
+ : "r"(mask), "r"(shift), "r"(val_trunc), "r"(~mask) \
+ : "memory"); \
+ } \
+}
+
+#define PERCPU_OP_8_16(op_name, op, expr, final_op) \
+ PERCPU_8_16_OP(op_name, op, 8, .b, u8, expr, final_op); \
+ PERCPU_8_16_OP(op_name, op, 16, .h, u16, expr, final_op)
+
+PERCPU_OP_8_16(add, add, val, add)
+PERCPU_OP_8_16(andnot, and, ~val, and)
+PERCPU_OP_8_16(or, or, val, or)
+
+#define PERCPU_8_16_RET_OP(name, amo_insn, sz, sfx, val_type, new_val_expr) \
+static inline val_type __percpu_##name##_return_amo_case_##sz(void *ptr, unsigned long val) \
+{ \
+ if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) && \
+ riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA)) { \
+ register val_type ret; \
+ asm volatile ("amo" #amo_insn #sfx " %[ret], %[val], %[ptr]" \
+ : [ptr] "+A"(*(val_type *)ptr), [ret] "=r"(ret) \
+ : [val] "r"((val_type)((new_val_expr) & PERCPU_8_16_GET_MASK(sz))) \
+ : "memory"); \
+ return ret + (val_type)((new_val_expr) & PERCPU_8_16_GET_MASK(sz)); \
+ } else { \
+ u32 *ptr32 = PERCPU_8_16_GET_PTR32(ptr); \
+ const unsigned long shift = PERCPU_8_16_GET_SHIFT(ptr); \
+ const u32 mask = (PERCPU_8_16_GET_MASK(sz) << shift); \
+ const u32 inv_mask = ~mask; \
+ const val_type val_trunc = (val_type)((new_val_expr) \
+ & PERCPU_8_16_GET_MASK(sz)); \
+ u32 old, new, tmp; \
+ \
+ asm volatile ( \
+ "0: lr.w %0, %3\n" \
+ "and %1, %0, %4\n" \
+ "srl %1, %1, %5\n" \
+ "add %1, %1, %6\n" \
+ "and %1, %1, %7\n" \
+ "sll %1, %1, %5\n" \
+ "and %2, %0, %8\n" \
+ "or %2, %2, %1\n" \
+ "sc.w %2, %2, %3\n" \
+ "bnez %2, 0b\n" \
+ : "=r"(old), "=r"(tmp), "=&r"(new), "+A"(*ptr32) \
+ : "r"(mask), "r"(shift), "r"(val_trunc), "r"(PERCPU_8_16_GET_MASK(sz)), \
+ "r"(inv_mask) \
+ : "memory"); \
+ return (val_type)(tmp); \
+ } \
+}
+
+PERCPU_8_16_RET_OP(add, add, 8, .b, u8, val)
+PERCPU_8_16_RET_OP(add, add, 16, .h, u16, val)
+
+#define _pcp_protect(op, pcp, ...) \
+({ \
+ preempt_disable_notrace(); \
+ op(raw_cpu_ptr(&(pcp)), __VA_ARGS__); \
+ preempt_enable_notrace(); \
+})
+
+#define _pcp_protect_return(op, pcp, args...) \
+({ \
+ typeof(pcp) __retval; \
+ preempt_disable_notrace(); \
+ __retval = (typeof(pcp))op(raw_cpu_ptr(&(pcp)), ##args); \
+ preempt_enable_notrace(); \
+ __retval; \
+})
+
+#define this_cpu_read_1(pcp) _pcp_protect_return(__percpu_read_8, pcp)
+#define this_cpu_read_2(pcp) _pcp_protect_return(__percpu_read_16, pcp)
+#define this_cpu_read_4(pcp) _pcp_protect_return(__percpu_read_32, pcp)
+#define this_cpu_read_8(pcp) _pcp_protect_return(__percpu_read_64, pcp)
+
+#define this_cpu_write_1(pcp, val) _pcp_protect(__percpu_write_8, pcp, (unsigned long)val)
+#define this_cpu_write_2(pcp, val) _pcp_protect(__percpu_write_16, pcp, (unsigned long)val)
+#define this_cpu_write_4(pcp, val) _pcp_protect(__percpu_write_32, pcp, (unsigned long)val)
+#define this_cpu_write_8(pcp, val) _pcp_protect(__percpu_write_64, pcp, (unsigned long)val)
+
+#define this_cpu_add_1(pcp, val) _pcp_protect(__percpu_add_amo_case_8, pcp, val)
+#define this_cpu_add_2(pcp, val) _pcp_protect(__percpu_add_amo_case_16, pcp, val)
+#define this_cpu_add_4(pcp, val) _pcp_protect(__percpu_add_amo_case_32, pcp, val)
+#define this_cpu_add_8(pcp, val) _pcp_protect(__percpu_add_amo_case_64, pcp, val)
+
+#define this_cpu_add_return_1(pcp, val) \
+_pcp_protect_return(__percpu_add_return_amo_case_8, pcp, val)
+
+#define this_cpu_add_return_2(pcp, val) \
+_pcp_protect_return(__percpu_add_return_amo_case_16, pcp, val)
+
+#define this_cpu_add_return_4(pcp, val) \
+_pcp_protect_return(__percpu_add_return_amo_case_32, pcp, val)
+
+#define this_cpu_add_return_8(pcp, val) \
+_pcp_protect_return(__percpu_add_return_amo_case_64, pcp, val)
+
+#define this_cpu_and_1(pcp, val) _pcp_protect(__percpu_andnot_amo_case_8, pcp, ~val)
+#define this_cpu_and_2(pcp, val) _pcp_protect(__percpu_andnot_amo_case_16, pcp, ~val)
+#define this_cpu_and_4(pcp, val) _pcp_protect(__percpu_andnot_amo_case_32, pcp, ~val)
+#define this_cpu_and_8(pcp, val) _pcp_protect(__percpu_andnot_amo_case_64, pcp, ~val)
+
+#define this_cpu_or_1(pcp, val) _pcp_protect(__percpu_or_amo_case_8, pcp, val)
+#define this_cpu_or_2(pcp, val) _pcp_protect(__percpu_or_amo_case_16, pcp, val)
+#define this_cpu_or_4(pcp, val) _pcp_protect(__percpu_or_amo_case_32, pcp, val)
+#define this_cpu_or_8(pcp, val) _pcp_protect(__percpu_or_amo_case_64, pcp, val)
+
+#define this_cpu_xchg_1(pcp, val) _pcp_protect_return(xchg_relaxed, pcp, val)
+#define this_cpu_xchg_2(pcp, val) _pcp_protect_return(xchg_relaxed, pcp, val)
+#define this_cpu_xchg_4(pcp, val) _pcp_protect_return(xchg_relaxed, pcp, val)
+#define this_cpu_xchg_8(pcp, val) _pcp_protect_return(xchg_relaxed, pcp, val)
+
+#define this_cpu_cmpxchg_1(pcp, o, n) _pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
+#define this_cpu_cmpxchg_2(pcp, o, n) _pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
+#define this_cpu_cmpxchg_4(pcp, o, n) _pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
+#define this_cpu_cmpxchg_8(pcp, o, n) _pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
+
+#define this_cpu_cmpxchg64(pcp, o, n) this_cpu_cmpxchg_8(pcp, o, n)
+
+#ifdef system_has_cmpxchg128
+#define this_cpu_cmpxchg128(pcp, o, n) \
+({ \
+ u128 ret__; \
+ typeof(pcp) *ptr__; \
+ \
+ preempt_disable_notrace(); \
+ ptr__ = raw_cpu_ptr(&(pcp)); \
+ if (system_has_cmpxchg128()) \
+ ret__ = cmpxchg128_local(ptr__, (o), (n)); \
+ else \
+ ret__ = this_cpu_generic_cmpxchg(pcp, (o), (n)); \
+ preempt_enable_notrace(); \
+ ret__; \
+})
+#endif
+
+#include <asm-generic/percpu.h>
+
+#endif /* __ASM_PERCPU_H */
--
2.39.5
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 3/3] riscv: store percpu offset into thread_info
2025-12-16 1:47 [PATCH v3 0/3] RISC-V: add percpu.h to include/asm Yunhui Cui
2025-12-16 1:47 ` [PATCH v3 1/3] riscv: remove irqflags.h inclusion in asm/bitops.h Yunhui Cui
2025-12-16 1:47 ` [PATCH v3 2/3] riscv: introduce percpu.h into include/asm Yunhui Cui
@ 2025-12-16 1:47 ` Yunhui Cui
2 siblings, 0 replies; 7+ messages in thread
From: Yunhui Cui @ 2025-12-16 1:47 UTC (permalink / raw)
To: aou, alex, andii, andybnac, apatel, ast, ben.dooks, bjorn, bpf,
charlie, cl, conor.dooley, cuiyunhui, cyrilbur, daniel, debug,
dennis, eddyz87, haoluo, john.fastabend, jolsa, kpsingh,
linux-kernel, linux-mm, linux-riscv, linux, martin.lau, palmer,
pjw, puranjay, pulehui, ruanjinjie, rkrcmar, samuel.holland, sdf,
song, tglx, tj, thuth, yonghong.song, yury.norov, zong.li
Originally we planned to add a register for the percpu offset,
which would speed up percpu variable R/W and reduce access
instructions. After discussion [1], it’s now stored in thread_info.
[1] https://lists.riscv.org/g/tech-privileged/topic/risc_v_tech_arch_review/113437553?page=2
Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
---
arch/riscv/include/asm/asm.h | 6 +-----
arch/riscv/include/asm/percpu.h | 4 ++++
arch/riscv/include/asm/switch_to.h | 8 ++++++++
arch/riscv/include/asm/thread_info.h | 5 +++--
arch/riscv/kernel/asm-offsets.c | 1 +
arch/riscv/kernel/smpboot.c | 7 +++++++
arch/riscv/net/bpf_jit_comp64.c | 9 +--------
7 files changed, 25 insertions(+), 15 deletions(-)
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index e9e8ba83e632f..137a49488325e 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -91,11 +91,7 @@
#ifdef CONFIG_SMP
.macro asm_per_cpu dst sym tmp
- lw \tmp, TASK_TI_CPU_NUM(tp)
- slli \tmp, \tmp, RISCV_LGPTR
- la \dst, __per_cpu_offset
- add \dst, \dst, \tmp
- REG_L \tmp, 0(\dst)
+ REG_L \tmp, TASK_TI_PCPU_OFFSET(tp)
la \dst, \sym
add \dst, \dst, \tmp
.endm
diff --git a/arch/riscv/include/asm/percpu.h b/arch/riscv/include/asm/percpu.h
index c5bacf6d864ee..35a63420a76a4 100644
--- a/arch/riscv/include/asm/percpu.h
+++ b/arch/riscv/include/asm/percpu.h
@@ -7,7 +7,9 @@
#include <asm/alternative-macros.h>
#include <asm/cpufeature-macros.h>
+#include <asm/current.h>
#include <asm/hwcap.h>
+#include <asm/thread_info.h>
#define PERCPU_RW_OPS(sz) \
static inline unsigned long __percpu_read_##sz(void *ptr) \
@@ -239,6 +241,8 @@ _pcp_protect_return(__percpu_add_return_amo_case_64, pcp, val)
})
#endif
+#define __my_cpu_offset (((struct thread_info *)current)->pcpu_offset)
+
#include <asm-generic/percpu.h>
#endif /* __ASM_PERCPU_H */
diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 0e71eb82f920c..733b6cd306e40 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -88,6 +88,13 @@ static inline void __switch_to_envcfg(struct task_struct *next)
:: "r" (next->thread.envcfg) : "memory");
}
+static inline void __switch_to_pcpu_offset(struct task_struct *next)
+{
+#ifdef CONFIG_SMP
+ next->thread_info.pcpu_offset = __my_cpu_offset;
+#endif
+}
+
extern struct task_struct *__switch_to(struct task_struct *,
struct task_struct *);
@@ -122,6 +129,7 @@ do { \
if (switch_to_should_flush_icache(__next)) \
local_flush_icache_all(); \
__switch_to_envcfg(__next); \
+ __switch_to_pcpu_offset(__next); \
((last) = __switch_to(__prev, __next)); \
} while (0)
diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
index 36918c9200c92..8d7d43cc9c405 100644
--- a/arch/riscv/include/asm/thread_info.h
+++ b/arch/riscv/include/asm/thread_info.h
@@ -52,7 +52,8 @@
*/
struct thread_info {
unsigned long flags; /* low level flags */
- int preempt_count; /* 0=>preemptible, <0=>BUG */
+ int preempt_count; /* 0=>preemptible, <0=>BUG */
+ int cpu;
/*
* These stack pointers are overwritten on every system call or
* exception. SP is also saved to the stack it can be recovered when
@@ -60,8 +61,8 @@ struct thread_info {
*/
long kernel_sp; /* Kernel stack pointer */
long user_sp; /* User stack pointer */
- int cpu;
unsigned long syscall_work; /* SYSCALL_WORK_ flags */
+ unsigned long pcpu_offset;
#ifdef CONFIG_SHADOW_CALL_STACK
void *scs_base;
void *scs_sp;
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index af827448a609e..fbf53b66b0e06 100644
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
@@ -38,6 +38,7 @@ void asm_offsets(void)
OFFSET(TASK_THREAD_SUM, task_struct, thread.sum);
OFFSET(TASK_TI_CPU, task_struct, thread_info.cpu);
+ OFFSET(TASK_TI_PCPU_OFFSET, task_struct, thread_info.pcpu_offset);
OFFSET(TASK_TI_PREEMPT_COUNT, task_struct, thread_info.preempt_count);
OFFSET(TASK_TI_KERNEL_SP, task_struct, thread_info.kernel_sp);
OFFSET(TASK_TI_USER_SP, task_struct, thread_info.user_sp);
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index d85916a3660c3..9e95c068b966b 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -209,6 +209,11 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
}
#endif
+void __init smp_prepare_boot_cpu(void)
+{
+ __my_cpu_offset = per_cpu_offset(smp_processor_id());
+}
+
void __init smp_cpus_done(unsigned int max_cpus)
{
}
@@ -234,6 +239,8 @@ asmlinkage __visible void smp_callin(void)
mmgrab(mm);
current->active_mm = mm;
+ __my_cpu_offset = per_cpu_offset(smp_processor_id());
+
#ifdef CONFIG_HOTPLUG_PARALLEL
cpuhp_ap_sync_alive();
#endif
diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
index 5f9457e910e87..4a492a6a1cc1e 100644
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -1345,15 +1345,8 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
if (rd != rs)
emit_mv(rd, rs, ctx);
#ifdef CONFIG_SMP
- /* Load current CPU number in T1 */
- emit_lw(RV_REG_T1, offsetof(struct thread_info, cpu),
+ emit_lw(RV_REG_T1, offsetof(struct thread_info, pcpu_offset),
RV_REG_TP, ctx);
- /* Load address of __per_cpu_offset array in T2 */
- emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
- /* Get address of __per_cpu_offset[cpu] in T1 */
- emit_sh3add(RV_REG_T1, RV_REG_T1, RV_REG_T2, ctx);
- /* Load __per_cpu_offset[cpu] in T1 */
- emit_ld(RV_REG_T1, 0, RV_REG_T1, ctx);
/* Add the offset to Rd */
emit_add(rd, rd, RV_REG_T1, ctx);
#endif
--
2.39.5
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/3] riscv: remove irqflags.h inclusion in asm/bitops.h
2025-12-16 1:47 ` [PATCH v3 1/3] riscv: remove irqflags.h inclusion in asm/bitops.h Yunhui Cui
@ 2025-12-16 17:39 ` Yury Norov
0 siblings, 0 replies; 7+ messages in thread
From: Yury Norov @ 2025-12-16 17:39 UTC (permalink / raw)
To: Yunhui Cui
Cc: aou, alex, andii, andybnac, apatel, ast, ben.dooks, bjorn, bpf,
charlie, cl, conor.dooley, cyrilbur, daniel, debug, dennis,
eddyz87, haoluo, john.fastabend, jolsa, kpsingh, linux-kernel,
linux-mm, linux-riscv, linux, martin.lau, palmer, pjw, puranjay,
pulehui, ruanjinjie, rkrcmar, samuel.holland, sdf, song, tglx,
tj, thuth, yonghong.song, zong.li
On Tue, Dec 16, 2025 at 09:47:19AM +0800, Yunhui Cui wrote:
> The arch/riscv/include/asm/bitops.h does not functionally require
> including /linux/irqflags.h. Additionally, adding
> arch/riscv/include/asm/percpu.h causes a circular inclusion:
> kernel/bounds.c
> ->include/linux/log2.h
> ->include/linux/bitops.h
> ->arch/riscv/include/asm/bitops.h
> ->include/linux/irqflags.h
> ->include/linux/find.h
> ->return val ? __ffs(val) : size;
> ->arch/riscv/include/asm/bitops.h
>
> The compilation log is as follows:
> CC kernel/bounds.s
> In file included from ./include/linux/bitmap.h:11,
> from ./include/linux/cpumask.h:12,
> from ./arch/riscv/include/asm/processor.h:55,
> from ./arch/riscv/include/asm/thread_info.h:42,
> from ./include/linux/thread_info.h:60,
> from ./include/asm-generic/preempt.h:5,
> from ./arch/riscv/include/generated/asm/preempt.h:1,
> from ./include/linux/preempt.h:79,
> from ./arch/riscv/include/asm/percpu.h:8,
> from ./include/linux/irqflags.h:19,
> from ./arch/riscv/include/asm/bitops.h:14,
> from ./include/linux/bitops.h:68,
> from ./include/linux/log2.h:12,
> from kernel/bounds.c:13:
> ./include/linux/find.h: In function 'find_next_bit':
> ./include/linux/find.h:66:30: error: implicit declaration of function '__ffs' [-Wimplicit-function-declaration]
> 66 | return val ? __ffs(val) : size;
> | ^~~~~
>
> Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
Acked-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
> ---
> arch/riscv/include/asm/bitops.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
> index 238092125c118..3c1a15be54d80 100644
> --- a/arch/riscv/include/asm/bitops.h
> +++ b/arch/riscv/include/asm/bitops.h
> @@ -11,7 +11,6 @@
> #endif /* _LINUX_BITOPS_H */
>
> #include <linux/compiler.h>
> -#include <linux/irqflags.h>
> #include <asm/barrier.h>
> #include <asm/bitsperlong.h>
>
> --
> 2.39.5
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 2/3] riscv: introduce percpu.h into include/asm
2025-12-16 1:47 ` [PATCH v3 2/3] riscv: introduce percpu.h into include/asm Yunhui Cui
@ 2025-12-20 14:45 ` kernel test robot
2025-12-20 16:31 ` kernel test robot
1 sibling, 0 replies; 7+ messages in thread
From: kernel test robot @ 2025-12-20 14:45 UTC (permalink / raw)
To: Yunhui Cui, aou, alex, andii, andybnac, apatel, ast, ben.dooks,
bjorn, bpf, charlie, cl, conor.dooley, cyrilbur, daniel, debug,
dennis, eddyz87, haoluo, john.fastabend, jolsa, kpsingh,
linux-kernel, linux-mm, linux-riscv, linux, martin.lau, palmer,
pjw, puranjay
Cc: llvm, oe-kbuild-all
Hi Yunhui,
kernel test robot noticed the following build warnings:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.19-rc1 next-20251219]
[cannot apply to bpf-next/net bpf-next/master bpf/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Yunhui-Cui/riscv-remove-irqflags-h-inclusion-in-asm-bitops-h/20251216-094956
base: linus/master
patch link: https://lore.kernel.org/r/20251216014721.42262-3-cuiyunhui%40bytedance.com
patch subject: [PATCH v3 2/3] riscv: introduce percpu.h into include/asm
config: riscv-randconfig-002-20251217 (https://download.01.org/0day-ci/archive/20251220/202512202218.FI6bB5kV-lkp@intel.com/config)
compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251220/202512202218.FI6bB5kV-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512202218.FI6bB5kV-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:846:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
846 | insw(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:109:53: note: expanded from macro 'insw'
109 | #define insw(addr, buffer, count) __insw(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from mm/slub.c:14:
In file included from include/linux/swap.h:9:
In file included from include/linux/memcontrol.h:13:
In file included from include/linux/cgroup.h:27:
In file included from include/linux/kernel_stat.h:8:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:854:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
854 | insl(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:110:53: note: expanded from macro 'insl'
110 | #define insl(addr, buffer, count) __insl(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from mm/slub.c:14:
In file included from include/linux/swap.h:9:
In file included from include/linux/memcontrol.h:13:
In file included from include/linux/cgroup.h:27:
In file included from include/linux/kernel_stat.h:8:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:863:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
863 | outsb(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:122:55: note: expanded from macro 'outsb'
122 | #define outsb(addr, buffer, count) __outsb(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from mm/slub.c:14:
In file included from include/linux/swap.h:9:
In file included from include/linux/memcontrol.h:13:
In file included from include/linux/cgroup.h:27:
In file included from include/linux/kernel_stat.h:8:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:872:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
872 | outsw(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:123:55: note: expanded from macro 'outsw'
123 | #define outsw(addr, buffer, count) __outsw(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from mm/slub.c:14:
In file included from include/linux/swap.h:9:
In file included from include/linux/memcontrol.h:13:
In file included from include/linux/cgroup.h:27:
In file included from include/linux/kernel_stat.h:8:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:881:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
881 | outsl(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:124:55: note: expanded from macro 'outsl'
124 | #define outsl(addr, buffer, count) __outsl(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from mm/slub.c:14:
In file included from include/linux/swap.h:9:
In file included from include/linux/memcontrol.h:13:
In file included from include/linux/cgroup.h:27:
In file included from include/linux/kernel_stat.h:8:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:1209:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
1209 | return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
| ~~~~~~~~~~ ^
>> mm/slub.c:4385:9: warning: variable '__old' is uninitialized when used within its own initialization [-Wuninitialized]
4385 | return this_cpu_try_cmpxchg_freelist(s->cpu_slab->freelist_tid,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
4386 | &old.freelist_tid, new.freelist_tid);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
mm/slab.h:31:39: note: expanded from macro 'this_cpu_try_cmpxchg_freelist'
31 | #define this_cpu_try_cmpxchg_freelist this_cpu_try_cmpxchg64
| ^
include/asm-generic/percpu.h:520:2: note: expanded from macro 'this_cpu_try_cmpxchg64'
520 | __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg64)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/asm-generic/percpu.h:110:24: note: expanded from macro '__cpu_fallback_try_cmpxchg'
110 | __val = _cmpxchg(pcp, __old, nval); \
| ~~~~~~~~~~~~~~^~~~~~~~~~~~
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/atomic/atomic-instrumented.h:4810:32: note: expanded from macro 'cmpxchg_relaxed'
4810 | raw_cmpxchg_relaxed(__ai_ptr, __VA_ARGS__); \
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~
arch/riscv/include/asm/cmpxchg.h:265:24: note: expanded from macro 'arch_cmpxchg_relaxed'
265 | _arch_cmpxchg((ptr), (o), (n), \
| ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
266 | SC_SFX(""), CAS_SFX(""), \
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
267 | SC_PREPEND(""), SC_APPEND(""), \
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
268 | CAS_PREPEND(""), CAS_APPEND(""))
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/cmpxchg.h:218:32: note: expanded from macro '_arch_cmpxchg'
218 | __typeof__(*(__ptr)) __old = (old); \
| ~~~~~ ^~~
mm/slub.c:4385:9: error: instruction requires the following: RV64I Base Instruction Set
mm/slab.h:31:39: note: expanded from macro 'this_cpu_try_cmpxchg_freelist'
31 | #define this_cpu_try_cmpxchg_freelist this_cpu_try_cmpxchg64
| ^
include/asm-generic/percpu.h:520:47: note: expanded from macro 'this_cpu_try_cmpxchg64'
520 | __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg64)
| ^
<inline asm>:1:5: note: instantiated into assembly here
1 | 0: lr.d s9, 0(a1)
| ^
mm/slub.c:4385:9: error: instruction requires the following: RV64I Base Instruction Set
4385 | return this_cpu_try_cmpxchg_freelist(s->cpu_slab->freelist_tid,
| ^
mm/slab.h:31:39: note: expanded from macro 'this_cpu_try_cmpxchg_freelist'
31 | #define this_cpu_try_cmpxchg_freelist this_cpu_try_cmpxchg64
| ^
include/asm-generic/percpu.h:520:47: note: expanded from macro 'this_cpu_try_cmpxchg64'
520 | __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg64)
| ^
<inline asm>:3:2: note: instantiated into assembly here
3 | sc.d a3, a0, 0(a1)
| ^
mm/slub.c:4385:9: error: instruction requires the following: RV64I Base Instruction Set
4385 | return this_cpu_try_cmpxchg_freelist(s->cpu_slab->freelist_tid,
| ^
mm/slab.h:31:39: note: expanded from macro 'this_cpu_try_cmpxchg_freelist'
31 | #define this_cpu_try_cmpxchg_freelist this_cpu_try_cmpxchg64
| ^
include/asm-generic/percpu.h:520:47: note: expanded from macro 'this_cpu_try_cmpxchg64'
520 | __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg64)
| ^
<inline asm>:1:5: note: instantiated into assembly here
1 | 0: lr.d s9, 0(a1)
| ^
mm/slub.c:4385:9: error: instruction requires the following: RV64I Base Instruction Set
4385 | return this_cpu_try_cmpxchg_freelist(s->cpu_slab->freelist_tid,
| ^
mm/slab.h:31:39: note: expanded from macro 'this_cpu_try_cmpxchg_freelist'
31 | #define this_cpu_try_cmpxchg_freelist this_cpu_try_cmpxchg64
| ^
include/asm-generic/percpu.h:520:47: note: expanded from macro 'this_cpu_try_cmpxchg64'
520 | __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg64)
| ^
<inline asm>:3:2: note: instantiated into assembly here
3 | sc.d a3, a0, 0(a1)
| ^
mm/slub.c:4385:9: error: instruction requires the following: RV64I Base Instruction Set
4385 | return this_cpu_try_cmpxchg_freelist(s->cpu_slab->freelist_tid,
| ^
mm/slab.h:31:39: note: expanded from macro 'this_cpu_try_cmpxchg_freelist'
31 | #define this_cpu_try_cmpxchg_freelist this_cpu_try_cmpxchg64
| ^
include/asm-generic/percpu.h:520:47: note: expanded from macro 'this_cpu_try_cmpxchg64'
520 | __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg64)
| ^
<inline asm>:1:5: note: instantiated into assembly here
1 | 0: lr.d s10, 0(a1)
| ^
mm/slub.c:4385:9: error: instruction requires the following: RV64I Base Instruction Set
4385 | return this_cpu_try_cmpxchg_freelist(s->cpu_slab->freelist_tid,
| ^
mm/slab.h:31:39: note: expanded from macro 'this_cpu_try_cmpxchg_freelist'
31 | #define this_cpu_try_cmpxchg_freelist this_cpu_try_cmpxchg64
| ^
include/asm-generic/percpu.h:520:47: note: expanded from macro 'this_cpu_try_cmpxchg64'
520 | __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg64)
| ^
<inline asm>:3:2: note: instantiated into assembly here
3 | sc.d a3, a0, 0(a1)
| ^
mm/slub.c:4385:9: error: instruction requires the following: RV64I Base Instruction Set
vim +/__old +4385 mm/slub.c
0b303fb402862d Vlastimil Babka 2021-05-08 4376
6801be4f2653e5 Peter Zijlstra 2023-05-31 4377 static inline bool
6801be4f2653e5 Peter Zijlstra 2023-05-31 4378 __update_cpu_freelist_fast(struct kmem_cache *s,
6801be4f2653e5 Peter Zijlstra 2023-05-31 4379 void *freelist_old, void *freelist_new,
6801be4f2653e5 Peter Zijlstra 2023-05-31 4380 unsigned long tid)
6801be4f2653e5 Peter Zijlstra 2023-05-31 4381 {
b244358e9a1cd6 Vlastimil Babka 2025-11-07 4382 struct freelist_tid old = { .freelist = freelist_old, .tid = tid };
b244358e9a1cd6 Vlastimil Babka 2025-11-07 4383 struct freelist_tid new = { .freelist = freelist_new, .tid = next_tid(tid) };
6801be4f2653e5 Peter Zijlstra 2023-05-31 4384
b244358e9a1cd6 Vlastimil Babka 2025-11-07 @4385 return this_cpu_try_cmpxchg_freelist(s->cpu_slab->freelist_tid,
b244358e9a1cd6 Vlastimil Babka 2025-11-07 4386 &old.freelist_tid, new.freelist_tid);
6801be4f2653e5 Peter Zijlstra 2023-05-31 4387 }
6801be4f2653e5 Peter Zijlstra 2023-05-31 4388
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 2/3] riscv: introduce percpu.h into include/asm
2025-12-16 1:47 ` [PATCH v3 2/3] riscv: introduce percpu.h into include/asm Yunhui Cui
2025-12-20 14:45 ` kernel test robot
@ 2025-12-20 16:31 ` kernel test robot
1 sibling, 0 replies; 7+ messages in thread
From: kernel test robot @ 2025-12-20 16:31 UTC (permalink / raw)
To: Yunhui Cui, aou, alex, andii, andybnac, apatel, ast, ben.dooks,
bjorn, bpf, charlie, cl, conor.dooley, cyrilbur, daniel, debug,
dennis, eddyz87, haoluo, john.fastabend, jolsa, kpsingh,
linux-kernel, linux-mm, linux-riscv, linux, martin.lau, palmer,
pjw, puranjay
Cc: llvm, oe-kbuild-all
Hi Yunhui,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on v6.19-rc1 next-20251219]
[cannot apply to bpf-next/net bpf-next/master bpf/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Yunhui-Cui/riscv-remove-irqflags-h-inclusion-in-asm-bitops-h/20251216-094956
base: linus/master
patch link: https://lore.kernel.org/r/20251216014721.42262-3-cuiyunhui%40bytedance.com
patch subject: [PATCH v3 2/3] riscv: introduce percpu.h into include/asm
config: riscv-randconfig-002-20251217 (https://download.01.org/0day-ci/archive/20251221/202512210052.w0bpUAAO-lkp@intel.com/config)
compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251221/202512210052.w0bpUAAO-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512210052.w0bpUAAO-lkp@intel.com/
All errors (new ones prefixed by >>):
109 | #define insw(addr, buffer, count) __insw(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/core/page_pool.c:14:
In file included from include/net/netdev_lock.h:7:
In file included from include/linux/netdevice.h:38:
In file included from include/net/net_namespace.h:43:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:854:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
854 | insl(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:110:53: note: expanded from macro 'insl'
110 | #define insl(addr, buffer, count) __insl(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/core/page_pool.c:14:
In file included from include/net/netdev_lock.h:7:
In file included from include/linux/netdevice.h:38:
In file included from include/net/net_namespace.h:43:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:863:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
863 | outsb(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:122:55: note: expanded from macro 'outsb'
122 | #define outsb(addr, buffer, count) __outsb(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/core/page_pool.c:14:
In file included from include/net/netdev_lock.h:7:
In file included from include/linux/netdevice.h:38:
In file included from include/net/net_namespace.h:43:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:872:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
872 | outsw(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:123:55: note: expanded from macro 'outsw'
123 | #define outsw(addr, buffer, count) __outsw(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/core/page_pool.c:14:
In file included from include/net/netdev_lock.h:7:
In file included from include/linux/netdevice.h:38:
In file included from include/net/net_namespace.h:43:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:881:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
881 | outsl(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:124:55: note: expanded from macro 'outsl'
124 | #define outsl(addr, buffer, count) __outsl(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/core/page_pool.c:14:
In file included from include/net/netdev_lock.h:7:
In file included from include/linux/netdevice.h:38:
In file included from include/net/net_namespace.h:43:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:1209:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
1209 | return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
| ~~~~~~~~~~ ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, s4, 0(a1)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a2, 0(a1)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a2, 0(a1)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, s9, 0(a1)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, s9, 0(a0)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, s7, 0(a1)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a2, 0(a1)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a2, 0(a1)
| ^
In file included from net/core/page_pool.c:11:
In file included from include/linux/slab.h:16:
In file included from include/linux/gfp.h:7:
In file included from include/linux/mmzone.h:8:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a2, 0(a1)
| ^
7 warnings and 9 errors generated.
--
include/asm-generic/io.h:854:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
854 | insl(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:110:53: note: expanded from macro 'insl'
110 | #define insl(addr, buffer, count) __insl(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:863:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
863 | outsb(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:122:55: note: expanded from macro 'outsb'
122 | #define outsb(addr, buffer, count) __outsb(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:872:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
872 | outsw(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:123:55: note: expanded from macro 'outsw'
123 | #define outsw(addr, buffer, count) __outsw(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:881:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
881 | outsl(addr, buffer, count);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:124:55: note: expanded from macro 'outsl'
124 | #define outsl(addr, buffer, count) __outsl(PCI_IOBASE + (addr), buffer, count)
| ~~~~~~~~~~ ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:12:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:12:
In file included from arch/riscv/include/asm/io.h:140:
include/asm-generic/io.h:1209:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
1209 | return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
| ~~~~~~~~~~ ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:5:
In file included from include/linux/fs.h:5:
In file included from include/linux/fs/super.h:5:
In file included from include/linux/fs/super_types.h:7:
In file included from include/linux/list_lru.h:13:
In file included from include/linux/shrinker.h:8:
In file included from include/linux/completion.h:12:
In file included from include/linux/swait.h:7:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a2, 0(a1)
| ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:5:
In file included from include/linux/fs.h:5:
In file included from include/linux/fs/super.h:5:
In file included from include/linux/fs/super_types.h:7:
In file included from include/linux/list_lru.h:13:
In file included from include/linux/shrinker.h:8:
In file included from include/linux/completion.h:12:
In file included from include/linux/swait.h:7:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, s6, 0(a1)
| ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:5:
In file included from include/linux/fs.h:5:
In file included from include/linux/fs/super.h:5:
In file included from include/linux/fs/super_types.h:7:
In file included from include/linux/list_lru.h:13:
In file included from include/linux/shrinker.h:8:
In file included from include/linux/completion.h:12:
In file included from include/linux/swait.h:7:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a2, 0(a1)
| ^
In file included from net/batman-adv/routing.c:7:
In file included from net/batman-adv/routing.h:10:
In file included from net/batman-adv/main.h:207:
In file included from include/linux/etherdevice.h:20:
In file included from include/linux/if_ether.h:19:
In file included from include/linux/skbuff.h:17:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:5:
In file included from include/linux/fs.h:5:
In file included from include/linux/fs/super.h:5:
In file included from include/linux/fs/super_types.h:7:
In file included from include/linux/list_lru.h:13:
In file included from include/linux/shrinker.h:8:
In file included from include/linux/completion.h:12:
In file included from include/linux/swait.h:7:
In file included from include/linux/spinlock.h:59:
In file included from include/linux/irqflags.h:19:
>> arch/riscv/include/asm/percpu.h:43:1: error: instruction requires the following: RV64I Base Instruction Set
43 | PERCPU_OP(add, add)
| ^
arch/riscv/include/asm/percpu.h:41:2: note: expanded from macro 'PERCPU_OP'
41 | __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
| ^
arch/riscv/include/asm/percpu.h:33:3: note: expanded from macro '__PERCPU_AMO_OP_CASE'
33 | "amo" #amo_insn #sfx " zero, %[val], %[ptr]" \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | amoadd.d zero, a1, 0(a2)
| ^
7 warnings and 4 errors generated.
..
vim +43 arch/riscv/include/asm/percpu.h
38
39 #define PERCPU_OP(name, amo_insn) \
40 __PERCPU_AMO_OP_CASE(.w, name, 32, amo_insn) \
41 __PERCPU_AMO_OP_CASE(.d, name, 64, amo_insn)
42
> 43 PERCPU_OP(add, add)
44 PERCPU_OP(andnot, and)
45 PERCPU_OP(or, or)
46
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-12-20 16:31 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2025-12-16 1:47 [PATCH v3 0/3] RISC-V: add percpu.h to include/asm Yunhui Cui
2025-12-16 1:47 ` [PATCH v3 1/3] riscv: remove irqflags.h inclusion in asm/bitops.h Yunhui Cui
2025-12-16 17:39 ` Yury Norov
2025-12-16 1:47 ` [PATCH v3 2/3] riscv: introduce percpu.h into include/asm Yunhui Cui
2025-12-20 14:45 ` kernel test robot
2025-12-20 16:31 ` kernel test robot
2025-12-16 1:47 ` [PATCH v3 3/3] riscv: store percpu offset into thread_info Yunhui Cui
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