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Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Benno Lossin Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org, Andreas Korb , Valentin Haudiquet , Deepak Gupta X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1764960107; l=2422; i=debug@rivosinc.com; s=20251023; h=from:subject:message-id; bh=bX3DT0H8/Cf0WOd9ExAzvQuoOWT5xK5PI+asRJPlwXE=; b=SSOzOiFS7a+lafurhUTL8mzosiTdRa0uawAAcSMqnOR2x3j3ayafozy6KNU05qCXpP5YUCtAz ojOOUAHM6GXCQSIURYO27EP3bbrLw90JCc81wJ3KIuVfX1tt406wvjR X-Developer-Key: i=debug@rivosinc.com; a=ed25519; pk=O37GQv1thBhZToXyQKdecPDhtWVbEDRQ0RIndijvpjk= X-Endpoint-Received: by B4 Relay for debug@rivosinc.com/20251023 with auth_id=553 X-Original-From: Deepak Gupta Reply-To: debug@rivosinc.com X-Rspamd-Queue-Id: 66C038001C X-Rspam-User: X-Rspamd-Server: rspam12 X-Stat-Signature: x3zu97gfbop8eeqg55u9zsf5j1n9cxrc X-HE-Tag: 1764960113-389265 X-HE-Meta: U2FsdGVkX1/FYWzsCJ5U6AQsoCy/JHBHpfzsrgGyCAzAy581VFFhY/HbSRol5U5uhUQsH6ymtOMJgP2hFyXssiS4MdTqxGbhsu5YJ2Bkg18e7fbq+yNxUr64DFPV35Cd6ypK/INH9qbmVZuESYZsFUjLTiwOA21lfYuYOLmUbX+d7M0/ZYBl2y//sqr5gviMsGAdgqblHB8DiSkj3zn34C+4bQGlxjKgL19WwKYWqAtFXCuyTY/okLiML7nsRqt452pptCiRRXJtMi8xX18ysZvx1ruaQzSpKiY2fMmoNuUvZUDt2wI6H6uGkmO+a601WI/p3IKwKAnMNhiwdjyNGt2kHa7uuETVLvJPsMc0URcPVmJdVYI+nxJEtL9X+0H+a4TB4jIoMGwcD/05i3H6gSyFC12RUfZvwmLDnTGgQOnSQqx8d9uNJmMUz7KoKCtQHNsOSRRda2346FO+Y1LB1RuxyVTgtzuZbs6+2Ncyz3uUP7ceMvgKMltGIR1TzYSmHopo25LMvJ9r1r9VXOglQ73KAGSAV7e52+mpMeGx7kfuePoUurz1U72ug6jHOC6mQzQSfBjGF9DxzzHHqFcFobrM4AsWYia2cDyFyhzdNQWSDRE2DmFLv+xcCIstd7AXWDkUAKG4D/JCAQ3cGL6VdU+LFOCcP7zjGvuAwXv3ziuNbQyJrxmHr9CjsaIh5mQ0d66HXHPSSrnIkQgrIG/kgKUCEVlb1zukWBItGV3VhV4KDQrB21Mr5DbraHRE4SWe0tNv4dF9NuisMTFpuKg4X4efECYQAz0kBnwyBudLJH68S2Mne5ipsRFYqoeZvm7dfhMpq18VfMq+9qMh/018uFKdnAdBX+H+9OhwqgQgC8ll3BrEEd9CxMzCIOytMzbIrwGOdgdBoc8npJ4iI23cc9yCyNNxruoe5Qos6b+PcYaZJ8p/YWglu2lnjc57ORQT5iwxTFihhbDbAsfjevt o2h1zd/t d23YZRteI6jiBEgAa36voStzU/+dt7f9Ix2PdDk/YlgEulwQAqNJG7ZExx2MdSozZt2UXqQJssfBK3fGeuev4fjYUgydGp3UwOs/WFU9qQJ+iBl4eBB04CTQIYd3AJUErmpK3J9tGwZQVIzHk4Op7t1qNS4t2iejwM3/u2JrfAtf5U22Syw7TGHyMTYtW25p8U/a7dnJLfsPJk0In2TQokx0qSx7N9uN/szU1HZd07KEEn/mrEguj9v0jbmqyAGjFyFMmNIGBwxY6qn4DX7AOrf7q9CdPXY0IWveb1lE9DF8/4Yyc1bLMVvdWH33Y4OJZbKz6Mqm01kN/r3ErqAgJAb2g3Kqm9iod5ewqj+dlwPpp7Fkwr5aHlvLuq6sNvclj6MIweZwiuVpc6z/WFo9e7ZLT1y0Us9Cac/iA3N5/N8IQ0sOlahq2BfhZso/RPN1dIvc370C4HSP7uMTtPnqNKCyBcPgk2rfLYMjLiq9BZwTpfsdJ+50pnuzHd6rbs0tJ9KCT3RsBli6gjzqPCCfNwxdJ+tgMzniK8SYr X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Deepak Gupta zicfiss and zicfilp extension gets enabled via b3 and b2 in *envcfg CSR. menvcfg controls enabling for S/HS mode. henvcfg control enabling for VS while senvcfg controls enabling for U/VU mode. zicfilp extension extends *status CSR to hold `expected landing pad` bit. A trap or interrupt can occur between an indirect jmp/call and target instr. `expected landing pad` bit from CPU is recorded into xstatus CSR so that when supervisor performs xret, `expected landing pad` state of CPU can be restored. zicfiss adds one new CSR - CSR_SSP: CSR_SSP contains current shadow stack pointer. Reviewed-by: Charlie Jenkins Tested-by: Andreas Korb Tested-by: Valentin Haudiquet Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/csr.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 4a37a98398ad..78f573ab4c53 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -18,6 +18,15 @@ #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */ #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */ +/* zicfilp landing pad status bit */ +#define SR_SPELP _AC(0x00800000, UL) +#define SR_MPELP _AC(0x020000000000, UL) +#ifdef CONFIG_RISCV_M_MODE +#define SR_ELP SR_MPELP +#else +#define SR_ELP SR_SPELP +#endif + #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ #define SR_FS_OFF _AC(0x00000000, UL) #define SR_FS_INITIAL _AC(0x00002000, UL) @@ -212,6 +221,8 @@ #define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) +#define ENVCFG_LPE (_AC(1, UL) << 2) +#define ENVCFG_SSE (_AC(1, UL) << 3) #define ENVCFG_CBIE_SHIFT 4 #define ENVCFG_CBIE (_AC(0x3, UL) << ENVCFG_CBIE_SHIFT) #define ENVCFG_CBIE_ILL _AC(0x0, UL) @@ -230,6 +241,11 @@ #define SMSTATEEN0_HSENVCFG (_ULL(1) << SMSTATEEN0_HSENVCFG_SHIFT) #define SMSTATEEN0_SSTATEEN0_SHIFT 63 #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) +/* + * zicfiss user mode csr + * CSR_SSP holds current shadow stack pointer. + */ +#define CSR_SSP 0x011 /* mseccfg bits */ #define MSECCFG_PMM ENVCFG_PMM -- 2.43.0