From: Deepak Gupta via B4 Relay <devnull+debug.rivosinc.com@kernel.org>
To: "Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>,
"Borislav Petkov" <bp@alien8.de>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Liam R. Howlett" <Liam.Howlett@oracle.com>,
"Vlastimil Babka" <vbabka@suse.cz>,
"Lorenzo Stoakes" <lorenzo.stoakes@oracle.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Conor Dooley" <conor@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Arnd Bergmann" <arnd@arndb.de>,
"Christian Brauner" <brauner@kernel.org>,
"Peter Zijlstra" <peterz@infradead.org>,
"Oleg Nesterov" <oleg@redhat.com>,
"Eric Biederman" <ebiederm@xmission.com>,
"Kees Cook" <kees@kernel.org>, "Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <shuah@kernel.org>, "Jann Horn" <jannh@google.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
"Benno Lossin" <lossin@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org,
linux-mm@kvack.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, linux-arch@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
alistair.francis@wdc.com, richard.henderson@linaro.org,
jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com,
charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com,
cleger@rivosinc.com, alexghiti@rivosinc.com,
samitolvanen@google.com, broonie@kernel.org,
rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org,
Zong Li <zong.li@sifive.com>,
Andreas Korb <andreas.korb@aisec.fraunhofer.de>,
Valentin Haudiquet <valentin.haudiquet@canonical.com>,
Deepak Gupta <debug@rivosinc.com>
Subject: [PATCH v25 23/28] arch/riscv: compile vdso with landing pad and shadow stack note
Date: Fri, 05 Dec 2025 10:42:01 -0800 [thread overview]
Message-ID: <20251205-v5_user_cfi_series-v25-23-1a07c0127361@rivosinc.com> (raw)
In-Reply-To: <20251205-v5_user_cfi_series-v25-0-1a07c0127361@rivosinc.com>
From: Jim Shu <jim.shu@sifive.com>
user mode tasks compiled with zicfilp may call indirectly into vdso (like
hwprobe indirect calls). Add landing pad compile support in vdso. vdso
with landing pad in it will be nop for tasks which have not enabled
landing pad. Furthermore, adding support for C sources of vdso to be
compiled with shadow stack and landing pad enabled as well.
Landing pad and shadow stack instructions are emitted only when VDSO_CFI
cflags option is defined during compile.
Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de>
Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com>
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
arch/riscv/Makefile | 5 +++-
arch/riscv/include/asm/assembler.h | 44 ++++++++++++++++++++++++++++++
arch/riscv/kernel/vdso/Makefile | 11 +++++++-
arch/riscv/kernel/vdso/flush_icache.S | 4 +++
arch/riscv/kernel/vdso/getcpu.S | 4 +++
arch/riscv/kernel/vdso/note.S | 3 ++
arch/riscv/kernel/vdso/rt_sigreturn.S | 4 +++
arch/riscv/kernel/vdso/sys_hwprobe.S | 4 +++
arch/riscv/kernel/vdso/vgetrandom-chacha.S | 5 +++-
9 files changed, 81 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index ecf2fcce2d92..f60c2de0ca08 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -81,9 +81,12 @@ riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) := $(riscv-march-y)_zacas
# Check if the toolchain supports Zabha
riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZABHA) := $(riscv-march-y)_zabha
+KBUILD_BASE_ISA = -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')
+export KBUILD_BASE_ISA
+
# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by
# matching non-v and non-multi-letter extensions out with the filter ([^v_]*)
-KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')
+KBUILD_CFLAGS += $(KBUILD_BASE_ISA)
KBUILD_AFLAGS += -march=$(riscv-march-y)
diff --git a/arch/riscv/include/asm/assembler.h b/arch/riscv/include/asm/assembler.h
index 16931712beab..f449c4392c29 100644
--- a/arch/riscv/include/asm/assembler.h
+++ b/arch/riscv/include/asm/assembler.h
@@ -80,3 +80,47 @@
.endm
#endif /* __ASM_ASSEMBLER_H */
+
+#if defined(VDSO_CFI) && (__riscv_xlen == 64)
+.macro vdso_lpad, label = 0
+lpad \label
+.endm
+#else
+.macro vdso_lpad, label = 0
+.endm
+#endif
+
+/*
+ * This macro emits a program property note section identifying
+ * architecture features which require special handling, mainly for
+ * use in assembly files included in the VDSO.
+ */
+#define NT_GNU_PROPERTY_TYPE_0 5
+#define GNU_PROPERTY_RISCV_FEATURE_1_AND 0xc0000000
+
+#define GNU_PROPERTY_RISCV_FEATURE_1_ZICFILP (1U << 0)
+#define GNU_PROPERTY_RISCV_FEATURE_1_ZICFISS (1U << 1)
+
+#if defined(VDSO_CFI) && (__riscv_xlen == 64)
+#define GNU_PROPERTY_RISCV_FEATURE_1_DEFAULT \
+ (GNU_PROPERTY_RISCV_FEATURE_1_ZICFILP | GNU_PROPERTY_RISCV_FEATURE_1_ZICFISS)
+#endif
+
+#ifdef GNU_PROPERTY_RISCV_FEATURE_1_DEFAULT
+.macro emit_riscv_feature_1_and, feat = GNU_PROPERTY_RISCV_FEATURE_1_DEFAULT
+ .pushsection .note.gnu.property, "a"
+ .p2align 3
+ .word 4
+ .word 16
+ .word NT_GNU_PROPERTY_TYPE_0
+ .asciz "GNU"
+ .word GNU_PROPERTY_RISCV_FEATURE_1_AND
+ .word 4
+ .word \feat
+ .word 0
+ .popsection
+.endm
+#else
+.macro emit_riscv_feature_1_and, feat = 0
+.endm
+#endif
diff --git a/arch/riscv/kernel/vdso/Makefile b/arch/riscv/kernel/vdso/Makefile
index 9ebb5e590f93..272f1d837a80 100644
--- a/arch/riscv/kernel/vdso/Makefile
+++ b/arch/riscv/kernel/vdso/Makefile
@@ -17,6 +17,11 @@ ifdef CONFIG_VDSO_GETRANDOM
vdso-syms += getrandom
endif
+ifdef VDSO_CFI_BUILD
+CFI_MARCH = _zicfilp_zicfiss
+CFI_FULL = -fcf-protection=full
+endif
+
# Files to link into the vdso
obj-vdso = $(patsubst %, %.o, $(vdso-syms)) note.o
@@ -27,6 +32,10 @@ endif
ccflags-y := -fno-stack-protector
ccflags-y += -DDISABLE_BRANCH_PROFILING
ccflags-y += -fno-builtin
+ccflags-y += $(KBUILD_BASE_ISA)$(CFI_MARCH)
+ccflags-y += $(CFI_FULL)
+asflags-y += $(KBUILD_BASE_ISA)$(CFI_MARCH)
+asflags-y += $(CFI_FULL)
ifneq ($(c-gettimeofday-y),)
CFLAGS_vgettimeofday.o += -fPIC -include $(c-gettimeofday-y)
@@ -79,7 +88,7 @@ include/generated/vdso-offsets.h: $(obj)/vdso.so.dbg FORCE
# The DSO images are built using a special linker script
# Make sure only to export the intended __vdso_xxx symbol offsets.
quiet_cmd_vdsold_and_check = VDSOLD $@
- cmd_vdsold_and_check = $(LD) $(ld_flags) -T $(filter-out FORCE,$^) -o $@.tmp && \
+ cmd_vdsold_and_check = $(LD) $(CFI_FULL) $(ld_flags) -T $(filter-out FORCE,$^) -o $@.tmp && \
$(OBJCOPY) $(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@ && \
rm $@.tmp && \
$(cmd_vdso_check)
diff --git a/arch/riscv/kernel/vdso/flush_icache.S b/arch/riscv/kernel/vdso/flush_icache.S
index 8f884227e8bc..e4c56970905e 100644
--- a/arch/riscv/kernel/vdso/flush_icache.S
+++ b/arch/riscv/kernel/vdso/flush_icache.S
@@ -5,11 +5,13 @@
#include <linux/linkage.h>
#include <asm/unistd.h>
+#include <asm/assembler.h>
.text
/* int __vdso_flush_icache(void *start, void *end, unsigned long flags); */
SYM_FUNC_START(__vdso_flush_icache)
.cfi_startproc
+ vdso_lpad
#ifdef CONFIG_SMP
li a7, __NR_riscv_flush_icache
ecall
@@ -20,3 +22,5 @@ SYM_FUNC_START(__vdso_flush_icache)
ret
.cfi_endproc
SYM_FUNC_END(__vdso_flush_icache)
+
+emit_riscv_feature_1_and
diff --git a/arch/riscv/kernel/vdso/getcpu.S b/arch/riscv/kernel/vdso/getcpu.S
index 9c1bd531907f..5c1ecc4e1465 100644
--- a/arch/riscv/kernel/vdso/getcpu.S
+++ b/arch/riscv/kernel/vdso/getcpu.S
@@ -5,14 +5,18 @@
#include <linux/linkage.h>
#include <asm/unistd.h>
+#include <asm/assembler.h>
.text
/* int __vdso_getcpu(unsigned *cpu, unsigned *node, void *unused); */
SYM_FUNC_START(__vdso_getcpu)
.cfi_startproc
+ vdso_lpad
/* For now, just do the syscall. */
li a7, __NR_getcpu
ecall
ret
.cfi_endproc
SYM_FUNC_END(__vdso_getcpu)
+
+emit_riscv_feature_1_and
diff --git a/arch/riscv/kernel/vdso/note.S b/arch/riscv/kernel/vdso/note.S
index 2a956c942211..3d92cc956b95 100644
--- a/arch/riscv/kernel/vdso/note.S
+++ b/arch/riscv/kernel/vdso/note.S
@@ -6,7 +6,10 @@
#include <linux/elfnote.h>
#include <linux/version.h>
+#include <asm/assembler.h>
ELFNOTE_START(Linux, 0, "a")
.long LINUX_VERSION_CODE
ELFNOTE_END
+
+emit_riscv_feature_1_and
diff --git a/arch/riscv/kernel/vdso/rt_sigreturn.S b/arch/riscv/kernel/vdso/rt_sigreturn.S
index 3dc022aa8931..e82987dc3739 100644
--- a/arch/riscv/kernel/vdso/rt_sigreturn.S
+++ b/arch/riscv/kernel/vdso/rt_sigreturn.S
@@ -5,12 +5,16 @@
#include <linux/linkage.h>
#include <asm/unistd.h>
+#include <asm/assembler.h>
.text
SYM_FUNC_START(__vdso_rt_sigreturn)
.cfi_startproc
.cfi_signal_frame
+ vdso_lpad
li a7, __NR_rt_sigreturn
ecall
.cfi_endproc
SYM_FUNC_END(__vdso_rt_sigreturn)
+
+emit_riscv_feature_1_and
diff --git a/arch/riscv/kernel/vdso/sys_hwprobe.S b/arch/riscv/kernel/vdso/sys_hwprobe.S
index 77e57f830521..f1694451a60c 100644
--- a/arch/riscv/kernel/vdso/sys_hwprobe.S
+++ b/arch/riscv/kernel/vdso/sys_hwprobe.S
@@ -3,13 +3,17 @@
#include <linux/linkage.h>
#include <asm/unistd.h>
+#include <asm/assembler.h>
.text
SYM_FUNC_START(riscv_hwprobe)
.cfi_startproc
+ vdso_lpad
li a7, __NR_riscv_hwprobe
ecall
ret
.cfi_endproc
SYM_FUNC_END(riscv_hwprobe)
+
+emit_riscv_feature_1_and
diff --git a/arch/riscv/kernel/vdso/vgetrandom-chacha.S b/arch/riscv/kernel/vdso/vgetrandom-chacha.S
index 5f0dad8f2373..916ab30a88f7 100644
--- a/arch/riscv/kernel/vdso/vgetrandom-chacha.S
+++ b/arch/riscv/kernel/vdso/vgetrandom-chacha.S
@@ -7,6 +7,7 @@
#include <asm/asm.h>
#include <linux/linkage.h>
+#include <asm/assembler.h>
.text
@@ -74,7 +75,7 @@ SYM_FUNC_START(__arch_chacha20_blocks_nostack)
#define _20 20, 20, 20, 20
#define _24 24, 24, 24, 24
#define _25 25, 25, 25, 25
-
+ vdso_lpad
/*
* The ABI requires s0-s9 saved.
* This does not violate the stack-less requirement: no sensitive data
@@ -247,3 +248,5 @@ SYM_FUNC_START(__arch_chacha20_blocks_nostack)
ret
SYM_FUNC_END(__arch_chacha20_blocks_nostack)
+
+emit_riscv_feature_1_and
--
2.43.0
next prev parent reply other threads:[~2025-12-05 18:42 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-05 18:41 [PATCH v25 00/28] riscv control-flow integrity for usermode Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 01/28] mm: VM_SHADOW_STACK definition for riscv Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 02/28] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 03/28] riscv: zicfiss / zicfilp enumeration Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 04/28] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 05/28] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 06/28] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 07/28] riscv/mm: manufacture shadow stack pte Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 08/28] riscv/mm: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 09/28] riscv/mm: write protect and shadow stack Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 10/28] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 11/28] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 12/28] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 13/28] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 14/28] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 15/28] riscv/traps: Introduce software check exception and uprobe handling Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 16/28] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 17/28] riscv/signal: save and restore of shadow stack for signal Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 18/28] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 19/28] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 20/28] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta via B4 Relay
2025-12-05 18:41 ` [PATCH v25 21/28] riscv: kernel command line option to opt out of user cfi Deepak Gupta via B4 Relay
2025-12-05 18:42 ` [PATCH v25 22/28] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta via B4 Relay
2025-12-05 18:42 ` Deepak Gupta via B4 Relay [this message]
2025-12-05 18:42 ` [PATCH v25 24/28] arch/riscv: dual vdso creation logic and select vdso based on hw Deepak Gupta via B4 Relay
2025-12-05 18:42 ` [PATCH v25 25/28] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta via B4 Relay
2025-12-05 18:42 ` [PATCH v25 26/28] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta via B4 Relay
2025-12-05 18:42 ` [PATCH v25 27/28] riscv: Documentation for shadow stack on riscv Deepak Gupta via B4 Relay
2025-12-05 18:42 ` [PATCH v25 28/28] kselftest/riscv: kselftest for user mode cfi Deepak Gupta via B4 Relay
2025-12-05 19:32 ` [PATCH v25 00/28] riscv control-flow integrity for usermode Krzysztof Kozlowski
2025-12-05 20:17 ` Borislav Petkov
2025-12-05 23:29 ` Deepak Gupta
-- strict thread matches above, loose matches on Subject: below --
2025-12-05 18:36 Deepak Gupta
2025-12-05 18:37 ` [PATCH v25 23/28] arch/riscv: compile vdso with landing pad and shadow stack note Deepak Gupta
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