From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64B0DD339AE for ; Fri, 5 Dec 2025 18:42:41 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 1E6856B008A; Fri, 5 Dec 2025 13:42:04 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 171676B008C; Fri, 5 Dec 2025 13:42:04 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id F2B626B0093; Fri, 5 Dec 2025 13:42:03 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id E15D66B008A for ; Fri, 5 Dec 2025 13:42:03 -0500 (EST) Received: from smtpin01.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id A424913A5DE for ; Fri, 5 Dec 2025 18:42:03 +0000 (UTC) X-FDA: 84186286926.01.E1D17DA Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by imf03.hostedemail.com (Postfix) with ESMTP id 8115B20007 for ; Fri, 5 Dec 2025 18:42:01 +0000 (UTC) Authentication-Results: imf03.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=M6JvGYye; spf=pass (imf03.hostedemail.com: domain of devnull+debug.rivosinc.com@kernel.org designates 172.234.252.31 as permitted sender) smtp.mailfrom=devnull+debug.rivosinc.com@kernel.org; dmarc=pass (policy=quarantine) header.from=kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1764960121; a=rsa-sha256; cv=none; b=DESGeeEKz7ha/AJvtYi0NptXj6BwNTXeX4pRKOWCIax9NRk15ClDmatISOtsibaIs8avAJ y2iKTDJp6s4cmDmhJj/Q+BeQ2R/lSiHQVNtlUYFrhwhtsyrp5R/6RkiPUYzZDK81tmieW4 OWYysliQiWEWIbQ3sDBAoStmBzuYhik= ARC-Authentication-Results: i=1; imf03.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=M6JvGYye; spf=pass (imf03.hostedemail.com: domain of devnull+debug.rivosinc.com@kernel.org designates 172.234.252.31 as permitted sender) smtp.mailfrom=devnull+debug.rivosinc.com@kernel.org; dmarc=pass (policy=quarantine) header.from=kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1764960121; h=from:from:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=Wb37FMLkaQXxCVMFZEwX1TVh0BV2pgaTlyUxUu1d/18=; b=5b/i6U59J7KzWcOulhh+4H6VHRsXmMFcGSwwtqMaAEs7FLFta8F3WkS8HwmiWuzVsrrZ1s BmBJgW2eFEF8rzHydXFdIduT2OLL9M83GYRI8t5ufNMoNq8hMkq5gqD/7ZLlkgGQCRQ6E8 fcMk9BxFRWNDvGqXQqHp/10ED9M2CMw= Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 2694E445F6; Fri, 5 Dec 2025 18:41:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id CC9F9C2BCC4; Fri, 5 Dec 2025 18:41:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1764960111; bh=xfwJUJCS9ahUKRHEfClfGG0LuGhQf8NoNaPkmhQ2VkA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=M6JvGYyed2C9WOjieSWmH1A8Bkrz6sBNdLj6kSy58vdWexC7JXGIWlnexwhWLJqE/ r0NXEaFtKwMDZ3THb58WGEr6V/cEfExFpzquwfn3Y+xe4cvB+yqRFKsNm4Oh9RWkja Xf7CcDgTdOR4+Wt+yXBlAm/EI+2JBHFLfa/Ls9+Htl0TeuZIHI1LovTYnS5d2NP38Y RhGW1d+ZzKx60T1JfY2oW0p/dtq6BGIIiO7/58PrjMTPNdz+lI/nwGPyA5z+zQUEeR cBnnzyt9PxmkTOdBBjwPGORDYTTHjS7qyCJ1Jj6FDLsahDWT9bw/ZXSBDcHb0W/CFw Td/jfPaglXD4g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2D37D339B2; Fri, 5 Dec 2025 18:41:51 +0000 (UTC) From: Deepak Gupta via B4 Relay Date: Fri, 05 Dec 2025 10:41:57 -0800 Subject: [PATCH v25 19/28] riscv/ptrace: riscv cfi status and state via ptrace and in core files MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251205-v5_user_cfi_series-v25-19-1a07c0127361@rivosinc.com> References: <20251205-v5_user_cfi_series-v25-0-1a07c0127361@rivosinc.com> In-Reply-To: <20251205-v5_user_cfi_series-v25-0-1a07c0127361@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Benno Lossin Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org, Valentin Haudiquet , Deepak Gupta X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1764960107; l=6975; i=debug@rivosinc.com; s=20251023; h=from:subject:message-id; bh=siKwPR31oz9T4kYUtjhttp1qlTcRSvwTqe1aSlr2SaI=; b=3MqIu5PpYSQEaaW2dnpabSQ+AMUhjSceFzzy+C9vH+XVCayeU97TGWZlF1kypY8oGmAOvDoDX wJfINmYsZoUAyHjEdZXnAOlZldUgydHhnURNGWM/WZ/kWK200cX8Alg X-Developer-Key: i=debug@rivosinc.com; a=ed25519; pk=O37GQv1thBhZToXyQKdecPDhtWVbEDRQ0RIndijvpjk= X-Endpoint-Received: by B4 Relay for debug@rivosinc.com/20251023 with auth_id=553 X-Original-From: Deepak Gupta Reply-To: debug@rivosinc.com X-Rspamd-Queue-Id: 8115B20007 X-Rspam-User: X-Rspamd-Server: rspam12 X-Stat-Signature: f35kxdzuko3je9io86t13xqhdyprcck5 X-HE-Tag: 1764960121-436995 X-HE-Meta: U2FsdGVkX1+huYmZkWTQRTRwwH44jMPtzUQ7lmTnjSDBMU3Aca8tExd9Y4TDXPKtMeM4gmCB86UWy2HR7PJB3V/4Mapl0rVL7gulOdKx6s2AJMutzp6esiTDhAw1Gp/3nmKXnuD4CJaHbdbqS1b7weWxDg4+dFl6XWO1ufWa1dZzPml8ASc5tcTWiLWjXNyZuSjX17zOQzrQljm3IsxrTm0assSFs//17VuargB1A+HcpDp4sm4ScXGpbyjdpkSyLJkNEMWWmxznP4yrWx+qdSY4Pgo7ahwQKcoFIhJABb5O95KreO+TThv3sQBW8VBDHTBXmbHHlYLr8OQycBwuFrGEcI2irE3kg4ZvsHpHNWDnspnlBdrXMxxElap/UUhiYsr9NfnEGowcZGHEqMu3kZrIzwRBgGtKafhw9ecZY6RbkwGBhNZieigR9AZzMN8AmhQ0iIIiSSDOnFjSwPY7/lF0Q/ekCiHkmvl3ZCgVwq1hFf/A16LBYTVt8KN/+II/2iVa7jFdaBJyUCQjau7erw0NEcn3qYMjStvCZlpqUtU9OribwsJEndxWXT4yztyER0kt9gM0GtN2xzmbjPEnzC9iX/SuYbNfobLpefDVroCQqE98bom46CIoyCqk3KafJ1tqKu35JBoX6nEvIYHadoEqByc9T2lauzfeK3XAuuYeS5C1RYncH/aCqlA0ZiGtqovFKnVe70bRvxTYx63WCD4s8qkuyF/P++v070xk26yHwB0Idws4LIHi1LeV9ezncSHUar3o4SLcZLjHTqYTpSsYKinnYhaJ1Xh4XpSfoGXiqPc7GSSeXgaxN9yDWZryMY6cFUTEyMoPb5cfsBrJ4a/7mGYRUxnR7nqns+6F8yysUu4dnU0uENmnDDODhnApDbOXD/xAtVzvzWbWn75XAF3MLyy3Nfzsux8Eu53XBbsgj5QwZ+eYYYB6kZgZ7W05/rVk9BErOZclbziajYZ HsMDhclr TxjXGSj6FV3h4DfmGn434Q93CbnFxc1IvpxsMbZV60DDNQVwuf8isEYOCwGNIVhAhN3/uFU+wkOoLkun0b2U5T1W4mh750FzdTPu+JPqOpm/J3e52std3uATdXi8HeWaSDy6mSTmk3w2CrudVcLIG5Tm/OukhD+8FCqhwan+XqGZHtiXvU7Ef+jAONcoM1tToxBgkXJj8957JpAUxd4Ka3GmhWAYOdwoxIppZzRG2WTmsWqoS7X51cabqQU63ZdxIrA8oElUEVY+9zQ2wMbjFC7e+7HplIJmTPPUC6zNUcy4WZXOQFb4xsqme5r7LU7hUCQOWvwGzdhAsBe5/kWgd/gsbfiZ2l0kix7rLpRupCIq9DfOkDiYgALXJxYM3Sj9ryfNyfaR7O3YNzuUddrPLsmtZ78YWs9yScdppHOL0LOt2WTwRFT9DRo+cWwZx70j9CGoDxF0NDBNzOUPCCwkffPsIuWeOGB3BLn1iDt8D/UJiFl/ZRqq+51r3DadoBsjPvye4p3dv81+yBAfBaeccwHVre0g0P9dZe3ta X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Deepak Gupta Expose a new register type NT_RISCV_USER_CFI for risc-v cfi status and state. Intentionally both landing pad and shadow stack status and state are rolled into cfi state. Creating two different NT_RISCV_USER_XXX would not be useful and wastage of a note type. Enabling, disabling and locking of feature is not allowed via ptrace set interface. However setting `elp` state or setting shadow stack pointer are allowed via ptrace set interface . It is expected `gdb` might have use to fixup `elp` state or `shadow stack` pointer. Tested-by: Valentin Haudiquet Signed-off-by: Deepak Gupta --- arch/riscv/include/uapi/asm/ptrace.h | 30 ++++++++++++ arch/riscv/kernel/ptrace.c | 95 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 2 + 3 files changed, 127 insertions(+) diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index 261bfe70f60a..b2a18dfeb2fb 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -131,6 +131,36 @@ struct __sc_riscv_cfi_state { unsigned long ss_ptr; /* shadow stack pointer */ }; +#define PTRACE_CFI_LP_EN_BIT 0 +#define PTRACE_CFI_LP_LOCK_BIT 1 +#define PTRACE_CFI_ELP_BIT 2 +#define PTRACE_CFI_SS_EN_BIT 3 +#define PTRACE_CFI_SS_LOCK_BIT 4 +#define PTRACE_CFI_SS_PTR_BIT 5 + +#define PTRACE_CFI_LP_EN_STATE (1 << PTRACE_CFI_LP_EN_BIT) +#define PTRACE_CFI_LP_LOCK_STATE (1 << PTRACE_CFI_LP_LOCK_BIT) +#define PTRACE_CFI_ELP_STATE (1 << PTRACE_CFI_ELP_BIT) +#define PTRACE_CFI_SS_EN_STATE (1 << PTRACE_CFI_SS_EN_BIT) +#define PTRACE_CFI_SS_LOCK_STATE (1 << PTRACE_CFI_SS_LOCK_BIT) +#define PTRACE_CFI_SS_PTR_STATE (1 << PTRACE_CFI_SS_PTR_BIT) + +#define PRACE_CFI_STATE_INVALID_MASK ~(PTRACE_CFI_LP_EN_STATE | \ + PTRACE_CFI_LP_LOCK_STATE | \ + PTRACE_CFI_ELP_STATE | \ + PTRACE_CFI_SS_EN_STATE | \ + PTRACE_CFI_SS_LOCK_STATE | \ + PTRACE_CFI_SS_PTR_STATE) + +struct __cfi_status { + __u64 cfi_state; +}; + +struct user_cfi_state { + struct __cfi_status cfi_status; + __u64 shstk_ptr; +}; + #endif /* __ASSEMBLER__ */ #endif /* _UAPI_ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 8e86305831ea..56b9e3871862 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -19,6 +19,7 @@ #include #include #include +#include enum riscv_regset { REGSET_X, @@ -31,6 +32,9 @@ enum riscv_regset { #ifdef CONFIG_RISCV_ISA_SUPM REGSET_TAGGED_ADDR_CTRL, #endif +#ifdef CONFIG_RISCV_USER_CFI + REGSET_CFI, +#endif }; static int riscv_gpr_get(struct task_struct *target, @@ -184,6 +188,87 @@ static int tagged_addr_ctrl_set(struct task_struct *target, } #endif +#ifdef CONFIG_RISCV_USER_CFI +static int riscv_cfi_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + memset(&user_cfi, 0, sizeof(user_cfi)); + regs = task_pt_regs(target); + + if (is_indir_lp_enabled(target)) { + user_cfi.cfi_status.cfi_state |= PTRACE_CFI_LP_EN_STATE; + user_cfi.cfi_status.cfi_state |= is_indir_lp_locked(target) ? + PTRACE_CFI_LP_LOCK_STATE : 0; + user_cfi.cfi_status.cfi_state |= (regs->status & SR_ELP) ? + PTRACE_CFI_ELP_STATE : 0; + } + + if (is_shstk_enabled(target)) { + user_cfi.cfi_status.cfi_state |= (PTRACE_CFI_SS_EN_STATE | + PTRACE_CFI_SS_PTR_STATE); + user_cfi.cfi_status.cfi_state |= is_shstk_locked(target) ? + PTRACE_CFI_SS_LOCK_STATE : 0; + user_cfi.shstk_ptr = get_active_shstk(target); + } + + return membuf_write(&to, &user_cfi, sizeof(user_cfi)); +} + +/* + * Does it make sense to allowing enable / disable of cfi via ptrace? + * Not allowing enable / disable / locking control via ptrace for now. + * Setting shadow stack pointer is allowed. GDB might use it to unwind or + * some other fixup. Similarly gdb might want to suppress elp and may want + * to reset elp state. + */ +static int riscv_cfi_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int ret; + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &user_cfi, 0, -1); + if (ret) + return ret; + + /* + * Not allowing enabling or locking shadow stack or landing pad + * There is no disabling of shadow stack or landing pad via ptrace + * rsvd field should be set to zero so that if those fields are needed in future + */ + if ((user_cfi.cfi_status.cfi_state & + (PTRACE_CFI_LP_EN_STATE | PTRACE_CFI_LP_LOCK_STATE | + PTRACE_CFI_SS_EN_STATE | PTRACE_CFI_SS_LOCK_STATE)) || + (user_cfi.cfi_status.cfi_state & PRACE_CFI_STATE_INVALID_MASK)) + return -EINVAL; + + /* If lpad is enabled on target and ptrace requests to set / clear elp, do that */ + if (is_indir_lp_enabled(target)) { + if (user_cfi.cfi_status.cfi_state & + PTRACE_CFI_ELP_STATE) /* set elp state */ + regs->status |= SR_ELP; + else + regs->status &= ~SR_ELP; /* clear elp state */ + } + + /* If shadow stack enabled on target, set new shadow stack pointer */ + if (is_shstk_enabled(target) && + (user_cfi.cfi_status.cfi_state & PTRACE_CFI_SS_PTR_STATE)) + set_active_shstk(target, user_cfi.shstk_ptr); + + return 0; +} +#endif + static const struct user_regset riscv_user_regset[] = { [REGSET_X] = { USER_REGSET_NOTE_TYPE(PRSTATUS), @@ -224,6 +309,16 @@ static const struct user_regset riscv_user_regset[] = { .set = tagged_addr_ctrl_set, }, #endif +#ifdef CONFIG_RISCV_USER_CFI + [REGSET_CFI] = { + .core_note_type = NT_RISCV_USER_CFI, + .align = sizeof(__u64), + .n = sizeof(struct user_cfi_state) / sizeof(__u64), + .size = sizeof(__u64), + .regset_get = riscv_cfi_get, + .set = riscv_cfi_set, + }, +#endif }; static const struct user_regset_view riscv_user_native_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index 819ded2d39de..ee30dcd80901 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -545,6 +545,8 @@ typedef struct elf64_shdr { #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ #define NN_RISCV_TAGGED_ADDR_CTRL "LINUX" #define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ +#define NN_RISCV_USER_CFI "LINUX" +#define NT_RISCV_USER_CFI 0x903 /* RISC-V shadow stack state */ #define NN_LOONGARCH_CPUCFG "LINUX" #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ #define NN_LOONGARCH_CSR "LINUX" -- 2.43.0