From: Samuel Holland <samuel.holland@sifive.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <pjw@kernel.org>,
linux-riscv@lists.infradead.org,
Andrew Morton <akpm@linux-foundation.org>,
David Hildenbrand <david@redhat.com>,
linux-mm@kvack.org
Cc: devicetree@vger.kernel.org,
Suren Baghdasaryan <surenb@google.com>,
linux-kernel@vger.kernel.org, Mike Rapoport <rppt@kernel.org>,
Michal Hocko <mhocko@suse.com>, Conor Dooley <conor@kernel.org>,
Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Alexandre Ghiti <alex@ghiti.fr>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh+dt@kernel.org>,
Vlastimil Babka <vbabka@suse.cz>,
"Liam R . Howlett" <Liam.Howlett@oracle.com>,
Samuel Holland <samuel.holland@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v3 16/22] riscv: alternative: Add an ALTERNATIVE_3 macro
Date: Wed, 12 Nov 2025 17:45:29 -0800 [thread overview]
Message-ID: <20251113014656.2605447-17-samuel.holland@sifive.com> (raw)
In-Reply-To: <20251113014656.2605447-1-samuel.holland@sifive.com>
ALT_FIXUP_MT() is already using ALTERNATIVE_2(), but it needs to be
extended to handle a fourth case. Add ALTERNATIVE_3(), which extends
ALTERNATIVE_2() with another block of new content.
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
---
(no changes since v2)
Changes in v2:
- Fix erroneously-escaped newline in assembly ALTERNATIVE_CFG_3 macro
arch/riscv/include/asm/alternative-macros.h | 45 ++++++++++++++++++---
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
index 9619bd5c8eba..e8bf384da5c2 100644
--- a/arch/riscv/include/asm/alternative-macros.h
+++ b/arch/riscv/include/asm/alternative-macros.h
@@ -50,8 +50,17 @@
ALT_NEW_CONTENT \vendor_id_2, \patch_id_2, \enable_2, "\new_c_2"
.endm
+.macro ALTERNATIVE_CFG_3 old_c, new_c_1, vendor_id_1, patch_id_1, enable_1, \
+ new_c_2, vendor_id_2, patch_id_2, enable_2, \
+ new_c_3, vendor_id_3, patch_id_3, enable_3
+ ALTERNATIVE_CFG_2 "\old_c", "\new_c_1", \vendor_id_1, \patch_id_1, \enable_1 \
+ "\new_c_2", \vendor_id_2, \patch_id_2, \enable_2
+ ALT_NEW_CONTENT \vendor_id_3, \patch_id_3, \enable_3, "\new_c_3"
+.endm
+
#define __ALTERNATIVE_CFG(...) ALTERNATIVE_CFG __VA_ARGS__
#define __ALTERNATIVE_CFG_2(...) ALTERNATIVE_CFG_2 __VA_ARGS__
+#define __ALTERNATIVE_CFG_3(...) ALTERNATIVE_CFG_3 __VA_ARGS__
#else /* !__ASSEMBLER__ */
@@ -98,6 +107,13 @@
__ALTERNATIVE_CFG(old_c, new_c_1, vendor_id_1, patch_id_1, enable_1) \
ALT_NEW_CONTENT(vendor_id_2, patch_id_2, enable_2, new_c_2)
+#define __ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, patch_id_1, enable_1, \
+ new_c_2, vendor_id_2, patch_id_2, enable_2, \
+ new_c_3, vendor_id_3, patch_id_3, enable_3) \
+ __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, patch_id_1, enable_1, \
+ new_c_2, vendor_id_2, patch_id_2, enable_2) \
+ ALT_NEW_CONTENT(vendor_id_3, patch_id_3, enable_3, new_c_3)
+
#endif /* __ASSEMBLER__ */
#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, CONFIG_k) \
@@ -108,6 +124,13 @@
__ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, patch_id_1, IS_ENABLED(CONFIG_k_1), \
new_c_2, vendor_id_2, patch_id_2, IS_ENABLED(CONFIG_k_2))
+#define _ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, patch_id_1, CONFIG_k_1, \
+ new_c_2, vendor_id_2, patch_id_2, CONFIG_k_2, \
+ new_c_3, vendor_id_3, patch_id_3, CONFIG_k_3) \
+ __ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, patch_id_1, IS_ENABLED(CONFIG_k_1), \
+ new_c_2, vendor_id_2, patch_id_2, IS_ENABLED(CONFIG_k_2), \
+ new_c_3, vendor_id_3, patch_id_3, IS_ENABLED(CONFIG_k_3))
+
#else /* CONFIG_RISCV_ALTERNATIVE */
#ifdef __ASSEMBLER__
@@ -118,11 +141,17 @@
#define __ALTERNATIVE_CFG(old_c, ...) ALTERNATIVE_CFG old_c
#define __ALTERNATIVE_CFG_2(old_c, ...) ALTERNATIVE_CFG old_c
+#define _ALTERNATIVE_CFG_3(old_c, ...) \
+ ALTERNATIVE_CFG old_c
+
#else /* !__ASSEMBLER__ */
#define __ALTERNATIVE_CFG(old_c, ...) old_c "\n"
#define __ALTERNATIVE_CFG_2(old_c, ...) old_c "\n"
+#define _ALTERNATIVE_CFG_3(old_c, ...) \
+ __ALTERNATIVE_CFG(old_c)
+
#endif /* __ASSEMBLER__ */
#define _ALTERNATIVE_CFG(old_c, ...) __ALTERNATIVE_CFG(old_c)
@@ -147,15 +176,21 @@
_ALTERNATIVE_CFG(old_content, new_content, vendor_id, patch_id, CONFIG_k)
/*
- * A vendor wants to replace an old_content, but another vendor has used
- * ALTERNATIVE() to patch its customized content at the same location. In
- * this case, this vendor can create a new macro ALTERNATIVE_2() based
- * on the following sample code and then replace ALTERNATIVE() with
- * ALTERNATIVE_2() to append its customized content.
+ * Variant of ALTERNATIVE() that supports two sets of replacement content.
*/
#define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, patch_id_1, CONFIG_k_1, \
new_content_2, vendor_id_2, patch_id_2, CONFIG_k_2) \
_ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, patch_id_1, CONFIG_k_1, \
new_content_2, vendor_id_2, patch_id_2, CONFIG_k_2)
+/*
+ * Variant of ALTERNATIVE() that supports three sets of replacement content.
+ */
+#define ALTERNATIVE_3(old_content, new_content_1, vendor_id_1, patch_id_1, CONFIG_k_1, \
+ new_content_2, vendor_id_2, patch_id_2, CONFIG_k_2, \
+ new_content_3, vendor_id_3, patch_id_3, CONFIG_k_3) \
+ _ALTERNATIVE_CFG_3(old_content, new_content_1, vendor_id_1, patch_id_1, CONFIG_k_1, \
+ new_content_2, vendor_id_2, patch_id_2, CONFIG_k_2, \
+ new_content_3, vendor_id_3, patch_id_3, CONFIG_k_3)
+
#endif
--
2.47.2
next prev parent reply other threads:[~2025-11-13 1:47 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-13 1:45 [PATCH v3 00/22] riscv: Memory type control for platforms with physical memory aliases Samuel Holland
2025-11-13 1:45 ` [PATCH v3 01/22] mm/ptdump: replace READ_ONCE() with standard page table accessors Samuel Holland
2025-11-13 1:45 ` [PATCH v3 02/22] mm: " Samuel Holland
2025-11-13 4:05 ` Dev Jain
2025-11-13 1:45 ` [PATCH v3 03/22] mm/dirty: replace READ_ONCE() with pudp_get() Samuel Holland
2025-11-13 1:45 ` [PATCH v3 04/22] perf/events: replace READ_ONCE() with standard page table accessors Samuel Holland
2025-11-13 19:10 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 05/22] mm: Move the fallback definitions of pXXp_get() Samuel Holland
2025-11-13 19:11 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 06/22] mm: Always use page table accessor functions Samuel Holland
2025-11-13 4:53 ` kernel test robot
2025-11-13 5:46 ` kernel test robot
2025-11-26 11:08 ` Christophe Leroy (CS GROUP)
2025-11-26 11:09 ` Ryan Roberts
2025-11-26 12:16 ` David Hildenbrand (Red Hat)
2025-11-26 12:19 ` David Hildenbrand (Red Hat)
2025-11-26 12:27 ` Lorenzo Stoakes
2025-11-26 12:35 ` David Hildenbrand (Red Hat)
2025-11-26 13:03 ` Ryan Roberts
2025-11-26 13:47 ` Wei Yang
2025-11-26 14:22 ` Ryan Roberts
2025-11-26 14:37 ` Lorenzo Stoakes
2025-11-26 14:53 ` David Hildenbrand (Red Hat)
2025-11-26 14:46 ` David Hildenbrand (Red Hat)
2025-11-26 14:52 ` Lorenzo Stoakes
2025-11-26 14:56 ` David Hildenbrand (Red Hat)
2025-11-26 15:08 ` Lorenzo Stoakes
2025-11-26 15:12 ` David Hildenbrand (Red Hat)
2025-11-26 16:07 ` Ryan Roberts
2025-11-26 16:34 ` Ryan Roberts
2025-11-26 20:31 ` David Hildenbrand (Red Hat)
2025-11-27 7:14 ` David Hildenbrand (Red Hat)
2025-11-27 7:31 ` David Hildenbrand (Red Hat)
2025-11-27 15:32 ` Ryan Roberts
2025-11-27 19:39 ` Christophe Leroy (CS GROUP)
2025-11-27 19:44 ` Christophe Leroy (CS GROUP)
2025-11-27 8:26 ` Christophe Leroy (CS GROUP)
2025-11-27 8:35 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 07/22] checkpatch: Warn on page table access without accessors Samuel Holland
2025-11-13 2:21 ` Joe Perches
2025-11-13 2:36 ` Samuel Holland
2025-11-13 19:17 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 08/22] mm: Allow page table accessors to be non-idempotent Samuel Holland
2025-11-13 7:19 ` kernel test robot
2025-11-27 16:57 ` Ryan Roberts
2025-11-27 17:47 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 09/22] riscv: hibernate: Replace open-coded pXXp_get() Samuel Holland
2025-11-13 1:45 ` [PATCH v3 10/22] riscv: mm: Always use page table accessor functions Samuel Holland
2025-11-13 1:45 ` [PATCH v3 11/22] riscv: mm: Simplify set_p4d() and set_pgd() Samuel Holland
2025-11-13 1:45 ` [PATCH v3 12/22] riscv: mm: Deduplicate _PAGE_CHG_MASK definition Samuel Holland
2025-11-13 1:45 ` [PATCH v3 13/22] riscv: ptdump: Only show N and MT bits when enabled in the kernel Samuel Holland
2025-11-13 1:45 ` [PATCH v3 14/22] riscv: mm: Fix up memory types when writing page tables Samuel Holland
2025-11-13 1:45 ` [PATCH v3 15/22] riscv: mm: Expose all page table bits to assembly code Samuel Holland
2025-11-13 1:45 ` Samuel Holland [this message]
2025-11-13 1:45 ` [PATCH v3 17/22] riscv: alternative: Allow calls with alternate link registers Samuel Holland
2025-11-13 1:45 ` [PATCH v3 18/22] riscv: Fix logic for selecting DMA_DIRECT_REMAP Samuel Holland
2025-11-13 1:45 ` [PATCH v3 19/22] dt-bindings: riscv: Describe physical memory regions Samuel Holland
2025-12-04 15:12 ` Rob Herring
2025-11-13 1:45 ` [PATCH v3 20/22] riscv: mm: Use physical memory aliases to apply PMAs Samuel Holland
2025-11-13 1:45 ` [PATCH v3 21/22] riscv: dts: starfive: jh7100: Use physical memory ranges for DMA Samuel Holland
2025-11-13 1:45 ` [PATCH v3 22/22] riscv: dts: eswin: eic7700: " Samuel Holland
2025-11-13 19:13 ` [PATCH v3 00/22] riscv: Memory type control for platforms with physical memory aliases David Hildenbrand (Red Hat)
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