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From: Peter Zijlstra <peterz@infradead.org>
To: Maciej Wieczor-Retman <m.wieczorretman@pm.me>
Cc: xin@zytor.com, kaleshsingh@google.com, kbingham@kernel.org,
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Subject: Re: [PATCH v6 15/18] x86/kasan: Handle UD1 for inline KASAN reports
Date: Tue, 11 Nov 2025 11:27:19 +0100	[thread overview]
Message-ID: <20251111102719.GH278048@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <8b0daaf83752528418bf2dd8d08906c37fa31f69.1761763681.git.m.wieczorretman@pm.me>

On Wed, Oct 29, 2025 at 08:09:51PM +0000, Maciej Wieczor-Retman wrote:
> From: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
> 
> Inline KASAN on x86 should do tag mismatch reports by passing the
> metadata through the UD1 instruction and the faulty address through RDI,
> a scheme that's already used by UBSan and is easy to extend.
> 
> The current LLVM way of passing KASAN software tag mode metadata is done
> using the INT3 instruction. However that should be changed because it
> doesn't align to how the kernel already handles UD1 for similar use
> cases. Since inline software tag-based KASAN doesn't work on x86 due to
> missing compiler support it can be fixed and the INT3 can be changed to
> UD1 at the same time.
> 
> Add a kasan component to the #UD decoding and handling functions.
> 
> Make part of that hook - which decides whether to die or recover from a
> tag mismatch - arch independent to avoid duplicating a long comment on
> both x86 and arm64 architectures.
> 

> diff --git a/arch/x86/include/asm/kasan.h b/arch/x86/include/asm/kasan.h
> index 396071832d02..375651d9b114 100644
> --- a/arch/x86/include/asm/kasan.h
> +++ b/arch/x86/include/asm/kasan.h
> @@ -6,6 +6,24 @@
>  #include <linux/kasan-tags.h>
>  #include <linux/types.h>
>  #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
> +
> +/*
> + * LLVM ABI for reporting tag mismatches in inline KASAN mode.
> + * On x86 the UD1 instruction is used to carry metadata in the ECX register
> + * to the KASAN report. ECX is used to differentiate KASAN from UBSan when
> + * decoding the UD1 instruction.
> + *
> + * SIZE refers to how many bytes the faulty memory access
> + * requested.
> + * WRITE bit, when set, indicates the access was a write, otherwise
> + * it was a read.
> + * RECOVER bit, when set, should allow the kernel to carry on after
> + * a tag mismatch. Otherwise die() is called.
> + */
> +#define KASAN_ECX_RECOVER	0x20
> +#define KASAN_ECX_WRITE		0x10
> +#define KASAN_ECX_SIZE_MASK	0x0f
> +#define KASAN_ECX_SIZE(ecx)	(1 << ((ecx) & KASAN_ECX_SIZE_MASK))
>  #define KASAN_SHADOW_SCALE_SHIFT 3

> diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
> index 6b22611e69cc..40fefd306c76 100644
> --- a/arch/x86/kernel/traps.c
> +++ b/arch/x86/kernel/traps.c
> @@ -179,6 +179,9 @@ __always_inline int decode_bug(unsigned long addr, s32 *imm, int *len)
>  	if (X86_MODRM_REG(v) == 0)	/* EAX */
>  		return BUG_UD1_UBSAN;
>  
> +	if (X86_MODRM_REG(v) == 1)	/* ECX */
> +		return BUG_UD1_KASAN;
> +
>  	return BUG_UD1;
>  }
>  
> @@ -357,6 +360,11 @@ static noinstr bool handle_bug(struct pt_regs *regs)
>  		}
>  		break;
>  
> +	case BUG_UD1_KASAN:
> +		kasan_inline_handler(regs);
> +		handled = true;
> +		break;
> +
>  	default:
>  		break;
>  	}

> +void kasan_inline_handler(struct pt_regs *regs)
> +{
> +	int metadata = regs->cx;
> +	u64 addr = regs->di;
> +	u64 pc = regs->ip;
> +	bool recover = metadata & KASAN_ECX_RECOVER;
> +	bool write = metadata & KASAN_ECX_WRITE;
> +	size_t size = KASAN_ECX_SIZE(metadata);
> +
> +	if (user_mode(regs))
> +		return;
> +
> +	if (!kasan_report((void *)addr, size, write, pc))
> +		return;
> +
> +	kasan_die_unless_recover(recover, "Oops - KASAN", regs, metadata, die);
> +}

I'm confused. Going by the ARM64 code, the meta-data is constant per
site -- it is encoded in the break immediate.

And I suggested you do the same on x86 by using the single byte
displacement instruction encoding.

	ud1	0xFF(%ecx), %ecx

Also, we don't have to use a fixed register for the address, you can do:

	ud1	0xFF(%ecx), %reg

and have %reg tell us what register the address is in.

Then you can recover the meta-data from the displacement immediate and
the address from whatever register is denoted.

This avoids the 'callsite' from having to clobber cx and move the address
into di.

What you have here will work, and I don't suppose we care about code
density with KASAN much, but it could've been so much better :/




  parent reply	other threads:[~2025-11-11 10:27 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-29 19:05 [PATCH v6 00/18] kasan: x86: arm64: KASAN tag-based mode for x86 Maciej Wieczor-Retman
2025-10-29 19:05 ` [PATCH v6 01/18] kasan: Unpoison pcpu chunks with base address tag Maciej Wieczor-Retman
2025-11-10 17:32   ` Alexander Potapenko
2025-11-17 17:51     ` Maciej Wieczór-Retman
2025-10-29 19:06 ` [PATCH v6 02/18] kasan: Unpoison vms[area] addresses with a common tag Maciej Wieczor-Retman
2025-11-10 16:40   ` Alexander Potapenko
2025-10-29 19:06 ` [PATCH v6 03/18] kasan: sw_tags: Use arithmetic shift for shadow computation Maciej Wieczor-Retman
2025-11-11  9:39   ` Alexander Potapenko
2025-11-17 18:27     ` Maciej Wieczór-Retman
2025-10-29 19:06 ` [PATCH v6 04/18] kasan: sw_tags: Support tag widths less than 8 bits Maciej Wieczor-Retman
2025-11-10 17:37   ` Alexander Potapenko
2025-11-17 18:35     ` Maciej Wieczór-Retman
2025-10-29 19:06 ` [PATCH v6 05/18] kasan: Fix inline mode for x86 tag-based mode Maciej Wieczor-Retman
2025-11-11  9:22   ` Alexander Potapenko
2025-10-29 19:07 ` [PATCH v6 06/18] x86/kasan: Add arch specific kasan functions Maciej Wieczor-Retman
2025-11-11  9:31   ` Alexander Potapenko
2025-11-17 18:41     ` Maciej Wieczór-Retman
2025-11-18 15:49       ` Maciej Wieczór-Retman
2025-10-29 19:07 ` [PATCH v6 07/18] kasan: arm64: x86: Make special tags arch specific Maciej Wieczor-Retman
2025-11-11  9:34   ` Alexander Potapenko
2025-10-29 19:07 ` [PATCH v6 08/18] x86/mm: Reset tag for virtual to physical address conversions Maciej Wieczor-Retman
2025-11-11  9:42   ` Alexander Potapenko
2025-10-29 19:07 ` [PATCH v6 09/18] mm/execmem: Untag addresses in EXECMEM_ROX related pointer arithmetic Maciej Wieczor-Retman
2025-11-11  9:13   ` Alexander Potapenko
2025-11-17 18:43     ` Maciej Wieczór-Retman
2025-10-29 20:07 ` [PATCH v6 10/18] x86/mm: Physical address comparisons in fill_p*d/pte Maciej Wieczor-Retman
2025-11-10 16:24   ` Alexander Potapenko
2025-11-17 18:58     ` Maciej Wieczór-Retman
2025-10-29 20:07 ` [PATCH v6 11/18] x86/kasan: KASAN raw shadow memory PTE init Maciej Wieczor-Retman
2025-11-11  9:11   ` Alexander Potapenko
2025-10-29 20:08 ` [PATCH v6 12/18] x86/mm: LAM compatible non-canonical definition Maciej Wieczor-Retman
2025-11-11  9:07   ` Alexander Potapenko
2025-10-29 20:08 ` [PATCH v6 13/18] x86/mm: LAM initialization Maciej Wieczor-Retman
2025-11-11  9:04   ` Alexander Potapenko
2025-10-29 20:09 ` [PATCH v6 14/18] x86: Minimal SLAB alignment Maciej Wieczor-Retman
2025-11-10 17:48   ` Alexander Potapenko
2025-11-18 11:36     ` Maciej Wieczor-Retman
2025-10-29 20:09 ` [PATCH v6 15/18] x86/kasan: Handle UD1 for inline KASAN reports Maciej Wieczor-Retman
2025-11-11 10:14   ` Alexander Potapenko
2025-11-11 10:27   ` Peter Zijlstra [this message]
2025-11-17  9:47     ` Maciej Wieczór-Retman
2025-11-18 20:35       ` Peter Zijlstra
2025-10-29 20:10 ` [PATCH v6 16/18] arm64: Unify software tag-based KASAN inline recovery path Maciej Wieczor-Retman
2025-11-11  9:02   ` Alexander Potapenko
2025-10-29 20:11 ` [PATCH v6 17/18] x86/kasan: Logical bit shift for kasan_mem_to_shadow Maciej Wieczor-Retman
2025-11-10 14:49   ` Marco Elver
2025-11-17 18:26     ` Maciej Wieczór-Retman
2025-10-29 20:11 ` [PATCH v6 18/18] x86/kasan: Make software tag-based kasan available Maciej Wieczor-Retman
2025-11-11  9:00   ` Alexander Potapenko
2025-11-18 11:48     ` Maciej Wieczor-Retman
2025-10-29 22:08 ` [PATCH v6 00/18] kasan: x86: arm64: KASAN tag-based mode for x86 Andrew Morton
2025-10-29 23:13   ` Andrew Morton
2025-10-30  5:31   ` Maciej Wieczór-Retman

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