From: Borislav Petkov <bp@alien8.de>
To: Shiju Jose <shiju.jose@huawei.com>
Cc: "rafael@kernel.org" <rafael@kernel.org>,
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Subject: Re: [PATCH v12 1/2] ACPI:RAS2: Add ACPI RAS2 driver
Date: Fri, 12 Sep 2025 16:11:55 +0200 [thread overview]
Message-ID: <20250912141155.GAaMQqK4vS8zHd1z4_@fat_crate.local> (raw)
In-Reply-To: <9dd5e9d8e9b04a93bd4d882ef5d8b63e@huawei.com>
On Fri, Sep 12, 2025 at 12:04:57PM +0000, Shiju Jose wrote:
> >Why is this requirement here?
> The physical memory address range retrieved here for the NUMA domain is used in the subsequent
> patch [PATCH v12 2/2] ras: mem: Add memory ACPI RAS2 driver,
> 1. to set Requested Address Range(INPUT) field of Table 5.87: Parameter Block Structure for PATROL_SCRUB
> when send GET_PATROL_PARAMETERS command to the firmware, to get scrub parameters, running status,
> current scrub rate etc.
> 2. for the validity check of the user requested memory address range to scrub.
Again, why does it have to be *lowest* and *contiguous*?
Your answer doesn't explain that.
> Also intended to expose this supported memory address range to the
> userspace via EDAC scrub control interface, though it is not present now.
Why? To tie ourselves with even more user ABI?!
There better be a good reason and not a better design for what this is trying
to do.
> >What happens with the aux devices you created successfully here? Unwind?
> Please see the previous discussions on this were about allowing the successfully created
> auxiliary devices to exist.
> https://lore.kernel.org/all/20250415210504.GA854098@yaz-khff2.amd.com/
There's no discussion here. And nothing answers the question "why" this is ok
to do this way.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2025-09-12 14:12 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-02 17:30 [PATCH v12 0/2] ACPI: Add support for ACPI RAS2 feature table shiju.jose
2025-09-02 17:30 ` [PATCH v12 1/2] ACPI:RAS2: Add ACPI RAS2 driver shiju.jose
2025-09-09 16:24 ` Yazen Ghannam
2025-09-10 8:38 ` Shiju Jose
2025-09-10 19:27 ` Borislav Petkov
2025-09-12 12:04 ` Shiju Jose
2025-09-12 14:11 ` Borislav Petkov [this message]
2025-09-15 11:50 ` Shiju Jose
2025-09-17 16:22 ` Borislav Petkov
2025-09-17 17:36 ` Jonathan Cameron
2025-09-18 20:22 ` Daniel Ferguson
2025-09-19 10:39 ` Borislav Petkov
2025-10-06 10:37 ` Shiju Jose
2025-10-16 10:30 ` Borislav Petkov
2025-10-17 12:54 ` Shiju Jose
2025-10-24 18:13 ` Daniel Ferguson
2025-11-03 13:19 ` Borislav Petkov
2025-11-04 12:55 ` Shiju Jose
2025-11-22 11:36 ` Borislav Petkov
2025-09-02 17:30 ` [PATCH v12 2/2] ras: mem: Add memory " shiju.jose
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