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[2003:e4:1f1c:4d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with UTF8SMTPSA id ffacd0b85a97d-3d85f80d8casm6829077f8f.54.2025.09.02.08.46.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Sep 2025 08:46:38 -0700 (PDT) From: Thierry Reding To: Thierry Reding , David Airlie , Simona Vetter , Sumit Semwal Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Benjamin Gaignard , Brian Starkey , John Stultz , "T.J. Mercier" , Andrew Morton , David Hildenbrand , Mike Rapoport , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-mm@kvack.org Subject: [PATCH 1/9] dt-bindings: reserved-memory: Document Tegra VPR Date: Tue, 2 Sep 2025 17:46:21 +0200 Message-ID: <20250902154630.4032984-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250902154630.4032984-1-thierry.reding@gmail.com> References: <20250902154630.4032984-1-thierry.reding@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Stat-Signature: duidq351cf1pth4bynsdenxkzcbtyh9j X-Rspam-User: X-Rspamd-Queue-Id: 944B5140011 X-Rspamd-Server: rspam01 X-HE-Tag: 1756828004-688964 X-HE-Meta: U2FsdGVkX1+y5pB6e9yHXVSJaeLsp8dv6Nncg9KItl7euPKgbGzXxCJi+yFC/q4pv7EEeUc0KuV5QpvqxTHjN3kkIqM5Lr+OVtFi1kqG9SxLNwmv/1PvAmGY9WPUqT26OUMnulyNXn28u95Cp78CZwenLUSJlrf/mywtBxa8esfSxgkcCzq4cdTeYwOgaMUe31qp+XTYd4xTpovLSERjB09sIqOckB7vbBDpP5/pQwVkmDLMakXu5H4C3UqMvEWaDVhk53uWZ7aRiXObMWE4X3VJevz0wZ2Zj5PlJaVcwPuI9mpYe7a2/4oBIPekJiSWm5XaVnvVFLBcyjFyamK6xPL1aG0OLueYR/4JKnbCeeJaJRIe30/8GQq7lIJN87ljbXtLB7R9MTXyLq9hJ+SaUDrmvCD7dSLOlmg3TyXwt1xc3Q+bVkfW+RVAQRkA0CrL5hUNVkazGZCex8V+e9tS9kZOP4Xcg/2DZgXLge7QrTPaT6S3sBTkSPzH84TQ9bSG3hEKuvh5lt6Hr999xdT1uIFoAr4xcGLhJco6M3kyloDFUun30quov2n6R4r7ZDcbfyIEzUwkLwW5GFQHfg/v1lj8CMCfNtOwMEtbBsGbI5KPdGBI2hiZqlQvj+yIhFyNnywjTZtZwyBALFWhH7F542Htsu7PdxCH2GIuShoM6gmZ0mMrLWeuo5536HJIk5MEHRCJKQyeqD97yIXj9O36FNS+hUYYSh8SoOtUBN2oGszPiCNgAZo602nPB9pTXKNm1XaHCKUNcvdp+LEp8/D15r8Q4VxXw7AritSIEnzYhzQw21oETRWeOPkDzKk6vpjQ2qj3iyarEL7/zFCTftkvrDEpeowdWvsLapUpqfSKzZEpPJpCOlO7QsWWJkNQq+tiKWkzgTt+LgYUcO7tTSRM5E6Bmm+nm1xKYfdWiRFhUvdjyh3SpX7ViDpYRgeTkFa4ACKgMZFtLwJlelTDRcD f07zxoUS tFzYwBJqJa00Un0MUoiIxprshmw0cWa9Ua+eW68gSNfikw/30M5gWrPEnCc4w3YyP79nPcHXTtgqUzf3ph9o1pPbtEfvIhqOBwmUHrHhBCsMFhsyvBkNDiatZ2v64/QqL5vluglPZSwTdMzfc+Vc0syDWnGK2ZGGma3oSyPwkfD08VIcWTWpFiNUZM/ZtRblww7NGYJhpUx4P1E9ixYHlpNXiPTCftIAOUEeocvv5YgXxuqhT+c1IaOBJcSpSJy0iBlPvkgkwZJlM+3vbKGHL1rDFyfHaNCzo2KYE9EGkKXieH7Ii/ZImSeJ+OITuz9sFZ+BfvYTYcwGx9YzkkXmWSoNDqiV3GYlxyoOVJQN9ACnQzda/LP+vUdXloiLaDg0Q/btvoo6NFksTptVx25dNNVf5dRJLJ3oMev5uBAwerRTpI1rCmfpwIksVf4q3GqT87P/WJzZTl/k8NNYzkVlAgcwiBwrWGYrhH88rvBCTvLOCkR3Ty7vFcXPyHikfeifVM1aOW7m7YjnbEYj/GnUKjlTEQzAIEc0kd8nZ8Ov0uf7ij0Zfd9DLapoF3kDy282ukMviAHTfc0KUUhs= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Thierry Reding The Video Protection Region (VPR) found on NVIDIA Tegra chips is a region of memory that is protected from CPU accesses. It is used to decode and play back DRM protected content. It is a standard reserved memory region that can exist in two forms: static VPR where the base address and size are fixed (uses the "reg" property to describe the memory) and a resizable VPR where only the size is known upfront and the OS can allocate it wherever it can be accomodated. Signed-off-by: Thierry Reding --- .../nvidia,tegra-video-protection-region.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml new file mode 100644 index 000000000000..c13292a791bb --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra-video-protection-region.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Video Protection Region (VPR) + +maintainers: + - Thierry Reding + - Jon Hunter + +description: | + NVIDIA Tegra chips have long supported a mechanism to protect a single, + contiguous memory region from non-secure memory accesses. Typically this + region is used for decoding and playback of DRM protected content. Various + devices, such as the display controller and multimedia engines (video + decoder) can access this region in a secure way. Access from the CPU is + generally forbidden. + + Two variants exist for VPR: one is fixed in both the base address and size, + while the other is resizable. Fixed VPR can be described by just a "reg" + property specifying the base address and size, whereas the resizable VPR + is defined by a size/alignment pair of properties. For resizable VPR the + memory is reusable by the rest of the system when it's unused for VPR and + therefore the "reusable" property must be specified along with it. For a + fixed VPR, the memory is permanently protected, and therefore it's not + reusable and must also be marked as "no-map" to prevent any (including + speculative) accesses to it. + +allOf: + - $ref: reserved-memory.yaml + +properties: + compatible: + const: nvidia,tegra-video-protection-region + +dependencies: + size: [alignment, reusable] + alignment: [size, reusable] + reusable: [alignment, size] + + reg: [no-map] + no-map: [reg] + +unevaluatedProperties: false + +oneOf: + - required: + - compatible + - reg + + - required: + - compatible + - size -- 2.50.0