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charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <83fb5685-a206-477c-bff3-03e0ebf4c40c@csgroup.eu> User-Agent: Mutt/1.4.2.3i X-Rspam-User: X-Rspamd-Queue-Id: E1315C000E X-Rspamd-Server: rspam10 X-Stat-Signature: fou4ii4c7fn4jujjohbkmbs8qsdpfpbh X-HE-Tag: 1750975756-441081 X-HE-Meta: U2FsdGVkX1/EeMHghd7PLYxzJfB89FnqAAQ/G6Xa0sOLZpN43w9UkMcoI8148wPEWFUQSF4JtnyqXuTPLkVsNNVUmwnr3gnS14Gh+JVJdRVmXkv6VlZTNNVutIeeLGGgGoU5o6+WEoD0ttZu69H/3M2D5dna2ah69eS1Ah/zOdmsxcNk6W+lMR95zoOX7uTE/w/avL30UmJ4d8MsG3xRZKMnPlbwGI/X2Ll0F9Mey4bKtxvKhVmNbuVlFL0Hc6wEvijrV2v7P8867PFqYqrbtanKOlembk5QVt5igep1jisDCxeDOA8J4x0aV1bT51OX9mw4eLovWrM30UF/dIRusmIwVl79MXzXJ5D7cq7heWItg4oOJR2lDbPQE+RwuoZfMP8nkPj0Nvz7G5+K0e7PKNoB+99euwHs1Mvgbqk/skEBveciwm3MLreDff9fB8jdcfrTRR4inBUD+oA6sJyLONLKoYyRAWmuPUUzHwlJKVLCHC9v2aGNzn5mfBmXjFVc1DK+SneUwLrZbfgPscks5Fctyh1o/9czqgYGBN3I/Il31ItxNR14+Dm6yRXEAjjne2k3rd9Mhg7MPxC7nmeBRsKAuQewDjTz/r11e+N5Ya+4pYQyRIXEpwkgAupXJh7e2cv4GupQwMqQZXXLGkToBSdmsp9ioif8miFz7oJ5+yLhwQWnJvpRORIHBd6XXrKUdYoG9laSGFj6sqpvspPWKwTgyCzVxFK3QfYO89kkO+W/U92eXsmMsf5vOcFzJ55y1tb+TaLlv70H3hzwXbboHp8c2DKjLwo76LcPpOfHNLNDX6fxhJSvo+fG9H8HcLxhubZ9kF3+VEZQ8zHvYFhWu4tZs+1ZLs0W2sA2w/sMysMPNnykjG3iuqbB8hBJFvWy X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Thu, Jun 26, 2025 at 07:56:10AM +0200, Christophe Leroy wrote: > Le 24/06/2025 à 23:08, David Laight a écrit : > >On Tue, 24 Jun 2025 13:25:05 -0500 > >Segher Boessenkool wrote: > >>>>isel (which is base PowerPC, not something "e500" only) is a > >>>>computational instruction, it copies one of two registers to a third, > >>>>which of the two is decided by any bit in the condition register. > >>> > >>>Does that mean it could be used for all the ppc cpu variants? > >> > >>No, only things that implement architecture version of 2.03 or later. > >>That is from 2006, so essentially everything that is still made > >>implements it :-) > >> > >>But ancient things do not. Both 970 (Apple G5) and Cell BE do not yet > >>have it (they are ISA 2.01 and 2.02 respectively). And the older p5's > >>do not have it yet either, but the newer ones do. > > For book3s64, GCC only use isel with -mcpu=power9 or -mcpu=power10 I have no idea what "book3s64" means. Some ancient Power architecture versions had something called "Book III-S", which was juxtaposed to "Book III-E", which essentially corresponds to the old aborted BookE stuff. I guess you mean almost all non-FSL implementations? Most of those support the isel insns. Like, Power5+ (GS). And everything after that. I have no idea why you think power9 has it while older CPUS do not. In the GCC source code we have this comment: /* For ISA 2.06, don't add ISEL, since in general it isn't a win, but altivec is a win so enable it. */ and in fact we do not enable it for ISA 2.06 (p8) either, probably for a similar reason. > >>And all classic PowerPC is ISA 1.xx of course. Medieval CPUs :-) > > > >That make more sense than the list in patch 5/5. > > Sorry for the ambiguity. In patch 5/5 I was addressing only powerpc/32, > and as far as I know the only powerpc/32 supported by Linux that has > isel is the 85xx which has an e500 core. What is "powerpc/32"? It does not help if you use different names from what everyone else does. The name "powerpc32" is sometimes used colloquially to mean PowerPC code running in SF=0 mode (MSR[SF]=0), but perhaps more often it is used for 32-bit only implementations (so, those that do not even have that bit: it's bit 0 in the 64-bit MSR, so all implementations that have an only 32-bit MSR, for example). > For powerpc/64 we have less constraint than on powerpc32: > - Kernel memory starts at 0xc000000000000000 > - User memory stops at 0x0010000000000000 That isn't true, not even if you mean some existing name. Usually userspace code is mapped at 256MB (0x10000000). On powerpc64-linux anyway, different default on different ABIs of course :-) > >And for access_ok() avoiding the conditional is a good enough reason > >to use a 'conditional move' instruction. > >Avoiding speculation is actually free. > > And on CPUs that are not affected by Spectre and Meltdown like powerpc > 8xx or powerpc 603, Erm. Segher