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From: Borislav Petkov <bp@alien8.de>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
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	Peter Zijlstra <peterz@infradead.org>,
	Ard Biesheuvel <ardb@kernel.org>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Josh Poimboeuf <jpoimboe@kernel.org>,
	Xiongwei Song <xiongwei.song@windriver.com>,
	Xin Li <xin3.li@intel.com>,
	"Mike Rapoport (IBM)" <rppt@kernel.org>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Michael Roth <michael.roth@amd.com>,
	Tony Luck <tony.luck@intel.com>,
	Alexey Kardashevskiy <aik@amd.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jonathan Corbet <corbet@lwn.net>,
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	linux-efi@vger.kernel.org, linux-mm@kvack.org
Subject: Re: [PATCHv7 01/16] x86/cpu: Enumerate the LASS feature bits
Date: Thu, 26 Jun 2025 17:22:13 +0200	[thread overview]
Message-ID: <20250626152213.GCaF1lpfzIcrKsOwRr@fat_crate.local> (raw)
In-Reply-To: <20250625125112.3943745-2-kirill.shutemov@linux.intel.com>

On Wed, Jun 25, 2025 at 03:50:53PM +0300, Kirill A. Shutemov wrote:
> From: Sohil Mehta <sohil.mehta@intel.com>
> 
> Linear Address Space Separation (LASS) is a security feature that
> intends to prevent malicious virtual address space accesses across
> user/kernel mode.
> 
> Such mode based access protection already exists today with paging and
> features such as SMEP and SMAP. However, to enforce these protections,
> the processor must traverse the paging structures in memory.  Malicious
> software can use timing information resulting from this traversal to
> determine details about the paging structures, and these details may
> also be used to determine the layout of the kernel memory.
> 
> The LASS mechanism provides the same mode-based protections as paging
> but without traversing the paging structures. Because the protections
> enforced by LASS are applied before paging, software will not be able to
> derive paging-based timing information from the various caching
> structures such as the TLBs, mid-level caches, page walker, data caches,
> etc.
> 
> LASS enforcement relies on the typical kernel implementation to divide
> the 64-bit virtual address space into two halves:
>   Addr[63]=0 -> User address space
>   Addr[63]=1 -> Kernel address space
> 
> Any data access or code execution across address spaces typically
> results in a #GP fault.
> 
> The LASS enforcement for kernel data access is dependent on CR4.SMAP
> being set. The enforcement can be disabled by toggling the RFLAGS.AC bit
> similar to SMAP.
> 
> Define the CPU feature bits to enumerate this feature and include
> feature dependencies to reflect the same.
> 
> LASS provides protection against a class of speculative attacks, such as
> SLAM[1]. Add the "lass" flag to /proc/cpuinfo to indicate that the feature
> is supported by hardware and enabled by the kernel. This allows userspace
> to determine if the setup is secure against such attacks.
> 
> [1] https://download.vusec.net/papers/slam_sp24.pdf
> 
> Co-developed-by: Yian Chen <yian.chen@intel.com>
> Signed-off-by: Yian Chen <yian.chen@intel.com>
> Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> ---
>  arch/x86/Kconfig.cpufeatures                | 4 ++++
>  arch/x86/include/asm/cpufeatures.h          | 1 +
>  arch/x86/include/uapi/asm/processor-flags.h | 2 ++
>  arch/x86/kernel/cpu/cpuid-deps.c            | 1 +
>  tools/arch/x86/include/asm/cpufeatures.h    | 1 +
>  5 files changed, 9 insertions(+)

Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de>

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette


  parent reply	other threads:[~2025-06-26 15:23 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20250625125112.3943745-1-kirill.shutemov@linux.intel.com>
     [not found] ` <20250625125112.3943745-3-kirill.shutemov@linux.intel.com>
2025-06-25 12:55   ` [PATCH] x86/vsyscall: Do not require X86_PF_INSTR to emulate vsyscall Kirill A. Shutemov
2025-06-26  9:22 ` [PATCHv7 00/16] x86: Enable Linear Address Space Separation support Vegard Nossum
2025-06-26  9:35   ` Vegard Nossum
2025-06-26 12:47     ` Kirill A. Shutemov
2025-06-26 13:15       ` Vegard Nossum
2025-06-29 11:40       ` David Laight
     [not found] ` <20250625125112.3943745-5-kirill.shutemov@linux.intel.com>
2025-06-26 13:49   ` [PATCHv7 03/16] x86/alternatives: Disable LASS when patching kernel alternatives Peter Zijlstra
2025-06-26 14:18     ` Dave Hansen
2025-06-27 10:27       ` Kirill A. Shutemov
     [not found] ` <20250625125112.3943745-15-kirill.shutemov@linux.intel.com>
2025-06-26 17:57   ` [PATCHv7 13/16] x86/traps: Handle LASS thrown #SS Xin Li
2025-06-27 10:31     ` Kirill A. Shutemov
2025-06-30  8:30       ` David Laight
2025-06-30  9:50         ` Kirill A. Shutemov
     [not found] ` <20250625125112.3943745-2-kirill.shutemov@linux.intel.com>
2025-06-26 15:22   ` Borislav Petkov [this message]
2025-06-26 18:00   ` [PATCHv7 01/16] x86/cpu: Enumerate the LASS feature bits Xin Li

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