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Peter Anvin" Cc: Jonathan Cameron , Catalin Marinas , james.morse@arm.com, linux-cxl@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, gregkh@linuxfoundation.org, Will Deacon , Dan Williams , Davidlohr Bueso , Yicong Yang , linuxarm@huawei.com, Yushan Wang , Lorenzo Pieralisi , Mark Rutland , Dave Hansen , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, Andy Lutomirski Subject: Re: [PATCH v2 0/8] Cache coherency management subsystem Message-ID: <20250625093152.GZ1613376@noisy.programming.kicks-ass.net> References: <20250624154805.66985-1-Jonathan.Cameron@huawei.com> <20250625085204.GC1613200@noisy.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Rspamd-Server: rspam11 X-Rspam-User: X-Rspamd-Queue-Id: 4D7E340017 X-Stat-Signature: gjnm4aesmgjqbxdupzefery6ifpck481 X-HE-Tag: 1750843928-189542 X-HE-Meta: U2FsdGVkX1/Rdmv/71N+7j+Hmuafz6cH8YTe5YlqaaRQLP+FndAG14jW1Dw0HOo1tT2VbOfIXRTxaW6So2Zd/vDj477fvM0afWf8cCODQhmU00Tz5kA/hHggZpvbpQHZrX1H4OUDFkEJPZvFriYFv619qqinuAkVQphTtqgeHS+bYj7v5RyqeYYTCKJP24zA7qiocFl8MijDe8OHoGbWUxPQS4xdaABfufEjMVjPMI7/VbpRPGh5s/AjoXYebe9iQgaJbiFKkZYL7zcX62G727THcBPhbclFdnKtRWXNf+i5xIeiHBePN9RshKXA74qFjv8IF2sxwsgryPDlP6To+V9RoweLkR1c+lfJzhY9iPKqI00UX2KsaQTRAbDvqbEZJ75MA0md5SZc0barxG14lnVP8lQ5etTY7+SwbNWKaEsqNvD2sP5axPgpapXm66njgZTzUsIad0Pt0gWUwcMIyIvvsC7fPbiFXjJHg6GTQ0QiLOmVyDhvv6ELVHjsjfXX9BMq9vsKo1TcFsJZkTLM5f5x4/FlcQ0DLLzMOj7HyCqDfZn6JKzCiFBKbWTBVu8UEiONlG/HVsiw3t2V/v2RjVaEN5IlgLZMnjDBoMVQT0Ciydi1rn/9X7zU1T4gPLdc95pYLcAgwinQOeemrWPAnWtIdzCZ78OOs6HP3HuIOnTGQelxTQlBIsrnTalu1SJB1Of+T4Of6YcY0wCe+11jXBixY8c7PYbQBAisRAZOpit2/xWQcPRkkHNGM83lV5x2pBlBMFYC2DGK8rZpJXGretArt0W8tdjuKX1QNf1Ysi//YgkxEiY/aJRisNf9bYFDlrq1SnSdGqo/bNXZ1rCEScU1NauDlIQCplUGXF+luyfRorrmhqc6Qm5YJdEbOKn/jnxBEt+Meaf1tcUZyuzKMqfVnF79HePBS/KlBXltJhgGVmVl1Z/4IvhYeI4HW2YKnDGmcT4f/+uNpnzYMmd o7+b8/kv OsuqOrZU14gTUe44IiBsfr9ExdzJ1HM2OTP053CL4PYGlQn9juaDsADQf8YV0oS6GpPJIkgph5BUiHCYa5OXL8W4p6iDmuTN8wmv6Yf8aFRtEgCpKTSsszcN512/SPbccYckL0oM4Zl81fxMZff5UqiMTS9Sf4UboNGpecpsA9eincOYUJe5obr+ymqf+dW9LyTWw2Oi+YHc5xJbYJf9UMZ3U+qDpZCLOpRPH+tzMHMtuX8+F1oyyB5HG2rkLKIdAXzIQ X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Wed, Jun 25, 2025 at 02:12:39AM -0700, H. Peter Anvin wrote: > On June 25, 2025 1:52:04 AM PDT, Peter Zijlstra wrote: > >On Tue, Jun 24, 2025 at 04:47:56PM +0100, Jonathan Cameron wrote: > > > >> On x86 there is the much loved WBINVD instruction that causes a write back > >> and invalidate of all caches in the system. It is expensive but it is > > > >Expensive is not the only problem. It actively interferes with things > >like Cache-Allocation-Technology (RDT-CAT for the intel folks). Doing > >WBINVD utterly destroys the cache subsystem for everybody on the > >machine. > > > >> necessary in a few corner cases. > > > >Don't we have things like CLFLUSH/CLFLUSHOPT/CLWB exactly so that we can > >avoid doing dumb things like WBINVD ?!? > > > >> These are cases where the contents of > >> Physical Memory may change without any writes from the host. Whilst there > >> are a few reasons this might happen, the one I care about here is when > >> we are adding or removing mappings on CXL. So typically going from > >> there being actual memory at a host Physical Address to nothing there > >> (reads as zero, writes dropped) or visa-versa. > > > >> The > >> thing that makes it very hard to handle with CPU flushes is that the > >> instructions are normally VA based and not guaranteed to reach beyond > >> the Point of Coherence or similar. You might be able to (ab)use > >> various flush operations intended to ensure persistence memory but > >> in general they don't work either. > > > >Urgh so this. Dan, Dave, are we getting new instructions to deal with > >this? I'm really not keen on having WBINVD in active use. > > > > WBINVD is the nuclear weapon to use when you have lost all notion of > where the problematic data can be, and amounts to a full reset of the > cache system. > > WBINVD can block interrupts for many *milliseconds*, system wide, and > so is really only useful for once-per-boot type events, like MTRR > initialization. Right this... But that CXL thing sounds like that's semi 'regular' to the point that providing some infrastructure around it makes sense. This should not be.