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From: guoren@kernel.org
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Subject: [RFC PATCH V3 39/43] rv64ilp32_abi: sysinfo: Adapt sysinfo structure to lp64 uapi
Date: Tue, 25 Mar 2025 08:16:20 -0400	[thread overview]
Message-ID: <20250325121624.523258-40-guoren@kernel.org> (raw)
In-Reply-To: <20250325121624.523258-1-guoren@kernel.org>

From: "Guo Ren (Alibaba DAMO Academy)" <guoren@kernel.org>

The RISC-V 64ilp32 ABI leverages LP64 uapi and accommodates LP64
ABI userspace directly, necessitating updates to the sysinfo
struct's unsigned long and array types with u64.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
---
 fs/proc/loadavg.c             | 10 +++++++---
 include/linux/sched/loadavg.h |  4 ++++
 include/uapi/linux/sysinfo.h  | 20 ++++++++++++++++++++
 kernel/sched/loadavg.c        |  4 ++++
 4 files changed, 35 insertions(+), 3 deletions(-)

diff --git a/fs/proc/loadavg.c b/fs/proc/loadavg.c
index 817981e57223..643e06de3446 100644
--- a/fs/proc/loadavg.c
+++ b/fs/proc/loadavg.c
@@ -13,14 +13,18 @@
 
 static int loadavg_proc_show(struct seq_file *m, void *v)
 {
+#if defined(CONFIG_64BIT) && (BITS_PER_LONG == 32)
+	unsigned long long avnrun[3];
+#else
 	unsigned long avnrun[3];
+#endif
 
 	get_avenrun(avnrun, FIXED_1/200, 0);
 
 	seq_printf(m, "%lu.%02lu %lu.%02lu %lu.%02lu %u/%d %d\n",
-		LOAD_INT(avnrun[0]), LOAD_FRAC(avnrun[0]),
-		LOAD_INT(avnrun[1]), LOAD_FRAC(avnrun[1]),
-		LOAD_INT(avnrun[2]), LOAD_FRAC(avnrun[2]),
+		LOAD_INT((ulong)avnrun[0]), LOAD_FRAC((ulong)avnrun[0]),
+		LOAD_INT((ulong)avnrun[1]), LOAD_FRAC((ulong)avnrun[1]),
+		LOAD_INT((ulong)avnrun[2]), LOAD_FRAC((ulong)avnrun[2]),
 		nr_running(), nr_threads,
 		idr_get_cursor(&task_active_pid_ns(current)->idr) - 1);
 	return 0;
diff --git a/include/linux/sched/loadavg.h b/include/linux/sched/loadavg.h
index 83ec54b65e79..8f2d6a827ee9 100644
--- a/include/linux/sched/loadavg.h
+++ b/include/linux/sched/loadavg.h
@@ -13,7 +13,11 @@
  *    11 bit fractions.
  */
 extern unsigned long avenrun[];		/* Load averages */
+#if defined(CONFIG_64BIT) && (BITS_PER_LONG == 32)
+extern void get_avenrun(unsigned long long *loads, unsigned long offset, int shift);
+#else
 extern void get_avenrun(unsigned long *loads, unsigned long offset, int shift);
+#endif
 
 #define FSHIFT		11		/* nr of bits of precision */
 #define FIXED_1		(1<<FSHIFT)	/* 1.0 as fixed-point */
diff --git a/include/uapi/linux/sysinfo.h b/include/uapi/linux/sysinfo.h
index 435d5c23f0c0..cd29a3d3cd10 100644
--- a/include/uapi/linux/sysinfo.h
+++ b/include/uapi/linux/sysinfo.h
@@ -5,6 +5,25 @@
 #include <linux/types.h>
 
 #define SI_LOAD_SHIFT	16
+
+#if (__riscv_xlen == 64) && (__BITS_PER_LONG == 32)
+struct sysinfo {
+	__s64 uptime;		/* Seconds since boot */
+	__u64 loads[3];		/* 1, 5, and 15 minute load averages */
+	__u64 totalram;		/* Total usable main memory size */
+	__u64 freeram;		/* Available memory size */
+	__u64 sharedram;	/* Amount of shared memory */
+	__u64 bufferram;	/* Memory used by buffers */
+	__u64 totalswap;	/* Total swap space size */
+	__u64 freeswap;		/* swap space still available */
+	__u16 procs;	   	/* Number of current processes */
+	__u16 pad;	   	/* Explicit padding for m68k */
+	__u64 totalhigh;	/* Total high memory size */
+	__u64 freehigh;		/* Available high memory size */
+	__u32 mem_unit;		/* Memory unit size in bytes */
+	char _f[20-2*sizeof(__u64)-sizeof(__u32)];	/* Padding: libc5 uses this.. */
+};
+#else
 struct sysinfo {
 	__kernel_long_t uptime;		/* Seconds since boot */
 	__kernel_ulong_t loads[3];	/* 1, 5, and 15 minute load averages */
@@ -21,5 +40,6 @@ struct sysinfo {
 	__u32 mem_unit;			/* Memory unit size in bytes */
 	char _f[20-2*sizeof(__kernel_ulong_t)-sizeof(__u32)];	/* Padding: libc5 uses this.. */
 };
+#endif
 
 #endif /* _LINUX_SYSINFO_H */
diff --git a/kernel/sched/loadavg.c b/kernel/sched/loadavg.c
index c48900b856a2..f1f5abc64dea 100644
--- a/kernel/sched/loadavg.c
+++ b/kernel/sched/loadavg.c
@@ -68,7 +68,11 @@ EXPORT_SYMBOL(avenrun); /* should be removed */
  *
  * These values are estimates at best, so no need for locking.
  */
+#if defined(CONFIG_64BIT) && (BITS_PER_LONG == 32)
+void get_avenrun(unsigned long long *loads, unsigned long offset, int shift)
+#else
 void get_avenrun(unsigned long *loads, unsigned long offset, int shift)
+#endif
 {
 	loads[0] = (avenrun[0] + offset) << shift;
 	loads[1] = (avenrun[1] + offset) << shift;
-- 
2.40.1



  parent reply	other threads:[~2025-03-25 12:26 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-25 12:15 [RFC PATCH V3 00/43] rv64ilp32_abi: Build CONFIG_64BIT kernel-self with ILP32 ABI guoren
2025-03-25 12:15 ` [RFC PATCH V3 01/43] rv64ilp32_abi: uapi: Reuse lp64 ABI interface guoren
2025-03-25 20:30   ` Jan Engelhardt
2025-03-26  3:35     ` Guo Ren
2025-03-25 20:41   ` Linus Torvalds
2025-03-26  6:34     ` Guo Ren
2025-03-27 16:20     ` Palmer Dabbelt
2025-03-25 12:15 ` [RFC PATCH V3 02/43] rv64ilp32_abi: riscv: Adapt Makefile and Kconfig guoren
2025-03-25 12:15 ` [RFC PATCH V3 03/43] rv64ilp32_abi: riscv: Adapt ULL & UL definition guoren
2025-03-25 12:15 ` [RFC PATCH V3 04/43] rv64ilp32_abi: riscv: Introduce xlen_t to adapt __riscv_xlen != BITS_PER_LONG guoren
2025-03-25 12:15 ` [RFC PATCH V3 05/43] rv64ilp32_abi: riscv: crc32: Utilize 64-bit width to improve the performance guoren
2025-03-25 12:15 ` [RFC PATCH V3 06/43] rv64ilp32_abi: riscv: csum: " guoren
2025-03-25 12:15 ` [RFC PATCH V3 07/43] rv64ilp32_abi: riscv: arch_hweight: Adapt cpopw & cpop of zbb extension guoren
2025-03-25 12:15 ` [RFC PATCH V3 08/43] rv64ilp32_abi: riscv: bitops: Adapt ctzw & clzw " guoren
2025-03-25 12:15 ` [RFC PATCH V3 09/43] rv64ilp32_abi: riscv: Reuse LP64 SBI interface guoren
2025-03-25 12:15 ` [RFC PATCH V3 10/43] rv64ilp32_abi: riscv: Update SATP.MODE.ASID width guoren
2025-03-25 12:15 ` [RFC PATCH V3 11/43] rv64ilp32_abi: riscv: Introduce PTR_L and PTR_S guoren
2025-03-25 12:15 ` [RFC PATCH V3 12/43] rv64ilp32_abi: riscv: Introduce cmpxchg_double guoren
2025-03-25 12:15 ` [RFC PATCH V3 13/43] rv64ilp32_abi: riscv: Correct stackframe layout guoren
2025-03-25 12:15 ` [RFC PATCH V3 14/43] rv64ilp32_abi: riscv: Adapt kernel module code guoren
2025-03-25 12:15 ` [RFC PATCH V3 15/43] rv64ilp32_abi: riscv: mm: Adapt MMU_SV39 for 2GiB address space guoren
2025-03-25 12:15 ` [RFC PATCH V3 16/43] rv64ilp32_abi: riscv: Support physical addresses >= 0x80000000 guoren
2025-03-25 12:15 ` [RFC PATCH V3 17/43] rv64ilp32_abi: riscv: Adapt kasan memory layout guoren
2025-03-25 12:15 ` [RFC PATCH V3 18/43] rv64ilp32_abi: riscv: kvm: Initial support guoren
2025-03-25 12:16 ` [RFC PATCH V3 19/43] rv64ilp32_abi: irqchip: irq-riscv-intc: Use xlen_t instead of ulong guoren
2025-03-25 12:16 ` [RFC PATCH V3 20/43] rv64ilp32_abi: drivers/perf: Adapt xlen_t of sbiret guoren
2025-03-25 12:16 ` [RFC PATCH V3 21/43] rv64ilp32_abi: asm-generic: Add custom BITS_PER_LONG definition guoren
2025-03-25 12:16 ` [RFC PATCH V3 22/43] rv64ilp32_abi: bpf: Change KERN_ARENA_SZ to 256MiB guoren
2025-03-25 12:16 ` [RFC PATCH V3 23/43] rv64ilp32_abi: compat: Correct compat_ulong_t cast guoren
2025-03-25 12:16 ` [RFC PATCH V3 24/43] rv64ilp32_abi: compiler_types: Add "long long" into __native_word() guoren
2025-03-25 12:16 ` [RFC PATCH V3 25/43] rv64ilp32_abi: exec: Adapt 64lp64 env and argv guoren
2025-03-25 17:19   ` Sergey Shtylyov
2025-03-26  9:22     ` Guo Ren
2025-03-25 12:16 ` [RFC PATCH V3 26/43] rv64ilp32_abi: file_ref: Use 32-bit width for refcnt guoren
2025-03-25 12:16 ` [RFC PATCH V3 27/43] rv64ilp32_abi: input: Adapt BITS_PER_LONG to dword guoren
2025-03-25 12:16 ` [RFC PATCH V3 28/43] rv64ilp32_abi: iov_iter: Resize kvec to match iov_iter's size guoren
2025-03-25 12:16 ` [RFC PATCH V3 29/43] rv64ilp32_abi: locking/atomic: Use BITS_PER_LONG for scripts guoren
2025-03-25 12:16 ` [RFC PATCH V3 30/43] rv64ilp32_abi: kernel/smp: Disable CSD_LOCK_WAIT_DEBUG guoren
2025-03-25 12:16 ` [RFC PATCH V3 31/43] rv64ilp32_abi: maple_tree: Use BITS_PER_LONG instead of CONFIG_64BIT guoren
2025-03-25 19:09   ` Liam R. Howlett
2025-03-27 12:47     ` Guo Ren
2025-03-25 12:16 ` [RFC PATCH V3 32/43] rv64ilp32_abi: mm: Remove _folio_nr_pages guoren
2025-03-25 12:16 ` [RFC PATCH V3 33/43] rv64ilp32_abi: mm/auxvec: Adapt mm->saved_auxv[] to Elf64 guoren
2025-03-25 12:16 ` [RFC PATCH V3 34/43] rv64ilp32_abi: mm: Adapt vm_flags_t struct guoren
2025-03-25 12:16 ` [RFC PATCH V3 35/43] rv64ilp32_abi: net: Use BITS_PER_LONG in struct dst_entry guoren
2025-03-25 12:16 ` [RFC PATCH V3 36/43] rv64ilp32_abi: printf: Use BITS_PER_LONG instead of CONFIG_64BIT guoren
2025-03-25 12:16 ` [RFC PATCH V3 37/43] rv64ilp32_abi: random: Adapt fast_pool struct guoren
2025-03-25 12:16 ` [RFC PATCH V3 38/43] rv64ilp32_abi: syscall: Use CONFIG_64BIT instead of BITS_PER_LONG guoren
2025-03-25 12:16 ` guoren [this message]
2025-03-25 12:16 ` [RFC PATCH V3 40/43] rv64ilp32_abi: tracepoint-defs: Using u64 for trace_print_flags.mask guoren
2025-03-25 12:16 ` [RFC PATCH V3 41/43] rv64ilp32_abi: tty: Adapt ptr_to_compat guoren
2025-03-25 12:16 ` [RFC PATCH V3 42/43] rv64ilp32_abi: memfd: Use vm_flag_t guoren
2025-03-25 12:16 ` [RFC PATCH V3 43/43] riscv: Fixup address space overlay of print_mlk guoren
2025-03-25 12:26 ` [RFC PATCH V3 00/43] rv64ilp32_abi: Build CONFIG_64BIT kernel-self with ILP32 ABI Peter Zijlstra
2025-03-25 13:13   ` Guo Ren
2025-03-25 13:17   ` Arnd Bergmann
2025-03-26  6:07     ` Guo Ren
2025-03-26  6:55       ` Arnd Bergmann
2025-03-27 13:13         ` Guo Ren
2025-03-25 18:51   ` David Hildenbrand
2025-03-25 19:23     ` Liam R. Howlett
2025-03-27 16:20       ` Palmer Dabbelt
2025-03-27 21:06 ` David Laight
2025-03-31  9:38   ` Guo Ren

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