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Fri, 7 Mar 2025 02:05:00 +0100 Date: Fri, 7 Mar 2025 09:04:55 +0800 From: Jonathan Cameron To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH 7/8] cxl/memfeature: Add CXL memory device soft PPR control feature Message-ID: <20250307090455.00001767@huawei.com> In-Reply-To: <20250227223816.2036-8-shiju.jose@huawei.com> References: <20250227223816.2036-1-shiju.jose@huawei.com> <20250227223816.2036-8-shiju.jose@huawei.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.43.65] X-ClientProxiedBy: lhrpeml500010.china.huawei.com (7.191.174.240) To frapeml500008.china.huawei.com (7.182.85.71) X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 16AFF160008 X-Rspam-User: X-Stat-Signature: 41wdk361chn3c6sdnuehphif8pu7ze3g X-HE-Tag: 1741309513-259073 X-HE-Meta: U2FsdGVkX1+MJORU48VjAaW+qwCiyr+yEsMFrCxW3sMenGjFV7ymuJuDdsYX0am77ufT2Yt8uMqI3nm3PcPTTW8mIdZzDW7vwS7OJ8q0EZ2aDHBUqEc5CRBqTH3qrMv6MNHBQJ4pAJ37xUdr+VcL070uzk57ehIs1aQTttCAqvsubleuq2K7mMR/aMnd5B0YKMbV585htc3sUwZIaTqvv+xT0pCCsCIBmoPToZIzqKOCavLK7SO0mrfaa7IKTDgxuSC+1aQJ5JTPGKnH3y5FsZO7bF1rpbIwWQguYfymznOeXbaoAdxA3YTbpZ1JjWkzBVl8ZKx6SEy29oFmo/yaFxAXF3XaTuIzvpVTT5AKf3rT7eJ3Ouka2TxVlXnqiaF91gmbpb0QIKWOKLHzCnLPjqJy29Tq8eMGLY8MeX20m58mILRbLk3xoIM65cY4A/I0UAkeQgoBDMak43t+aBAXA9t1ORT/B5MBkCmtIrynkwpQgg3DYoRaKW+AOvGRCgQIfBsyXW4rdcoaHT2Clu8v6Yov6Fg0zdaZgHcbvTmnPqtQTLFKGI5LspPjd+0p9sEPbzwQBBPsYDpRmqL2kD58i03IFPkZJWmrvrQP0KpVFRatv34KMiSf48Vr4dYnmwPkDU2IsLeh4q3GSolTsHe+FFNtegIz9ltqwnIfY2D51uOkfr3pZXGfND3VNQZoJx39EX3EuU779G8F5SQ5q2PNpOgW/AaXVW8bVaHZFGyBZ4v0+ISEfap/u+aToMStGrCTP+fGDr9SA/8iEpxWaohI7ljKgOwqPBYclGtszBOrpZsHrie5Hv6amThzReF1NFQ6GfF5HbxpqcKpVg8IM0wIZcqSYGKc99flBW/8Ugaojj2akCqktAjf6dxtMZ7zAUgtL70zkWCwy0oCztmrX4IQDMRDHFopvMVDJmTONmdC9gSiy0ho6WCK9jApQ/aEd8abNkFU6CXrtcZUKSl+TOj agkKZP6g 6cGgPQMXKZZgZEXY0yTao1+OnEtP72KpB9QMmAmucE0cVgS+F2AXbxjyXJRMhDOmUCQAUjgHAhbuoCgprVuYY8o751yZMckP0Owh8J3nH5Pg/beMVHPvz4zCTYVU9Y57qC1Ld3/Sne7pneEd//zhGaECs1JGiYVRUqSIdtSW2ZvERQbOcZ6wRhdMO7j7z9/dUgZqJhqenmaed4UodrNapkj2uOdtQOXViBTKWbO8n81XfN/CfqR5ClvJCKBkpvjte4Su9IIoiyuC2IUHnb+iAbNUnH6wjU+8K9TH2K2O+YfF96wW0i8CEmUlXsgrFb7xYS8rzhfBblFD6SU066K9f5ZSxBMmWIXB/y4v/mUqI3XBQB5TJHDWjToH0ew== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Thu, 27 Feb 2025 22:38:14 +0000 wrote: > From: Shiju Jose > > Post Package Repair (PPR) maintenance operations may be supported by CXL > devices that implement CXL.mem protocol. A PPR maintenance operation > requests the CXL device to perform a repair operation on its media. > For example, a CXL device with DRAM components that support PPR features > may implement PPR Maintenance operations. DRAM components may support two > types of PPR, hard PPR (hPPR), for a permanent row repair, and Soft PPR > (sPPR), for a temporary row repair. Soft PPR is much faster than hPPR, > but the repair is lost with a power cycle. > > During the execution of a PPR Maintenance operation, a CXL memory device: > - May or may not retain data > - May or may not be able to process CXL.mem requests correctly, including > the ones that target the DPA involved in the repair. > These CXL Memory Device capabilities are specified by Restriction Flags > in the sPPR Feature and hPPR Feature. > > Soft PPR maintenance operation may be executed at runtime, if data is > retained and CXL.mem requests are correctly processed. For CXL devices with > DRAM components, hPPR maintenance operation may be executed only at boot > because typically data may not be retained with hPPR maintenance operation. > > When a CXL device identifies error on a memory component, the device > may inform the host about the need for a PPR maintenance operation by using > an Event Record, where the Maintenance Needed flag is set. The Event Record > specifies the DPA that should be repaired. A CXL device may not keep track > of the requests that have already been sent and the information on which > DPA should be repaired may be lost upon power cycle. > The userspace tool requests for maintenance operation if the number of > corrected error reported on a CXL.mem media exceeds error threshold. > > CXL spec 3.2 section 8.2.10.7.1.2 describes the device's sPPR (soft PPR) > maintenance operation and section 8.2.10.7.1.3 describes the device's > hPPR (hard PPR) maintenance operation feature. > > CXL spec 3.2 section 8.2.10.7.2.1 describes the sPPR feature discovery and > configuration. > > CXL spec 3.2 section 8.2.10.7.2.2 describes the hPPR feature discovery and > configuration. > > Add support for controlling CXL memory device soft PPR (sPPR) feature. > Register with EDAC driver, which gets the memory repair attr descriptors > from the EDAC memory repair driver and exposes sysfs repair control > attributes for PRR to the userspace. For example CXL PPR control for the > CXL mem0 device is exposed in /sys/bus/edac/devices/cxl_mem0/mem_repairX/ > > Add checks to ensure the memory to be repaired is offline and originates > from a CXL DRAM or CXL gen_media error record reported in the current boot, > before requesting a PPR operation on the device. > > Tested with QEMU patch for CXL PPR feature. > https://lore.kernel.org/all/20240730045722.71482-1-dave@stgolabs.net/ > > Reviewed-by: Dave Jiang > Signed-off-by: Shiju Jose Reviewed-by: Jonathan Cameron