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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: <shiju.jose@huawei.com>
Cc: <linux-cxl@vger.kernel.org>, <dan.j.williams@intel.com>,
	<dave@stgolabs.net>, <dave.jiang@intel.com>,
	<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
	<ira.weiny@intel.com>, <david@redhat.com>,
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	<linux-acpi@vger.kernel.org>, <linux-mm@kvack.org>,
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	<tony.luck@intel.com>, <rafael@kernel.org>, <lenb@kernel.org>,
	<mchehab@kernel.org>, <leo.duran@amd.com>,
	<Yazen.Ghannam@amd.com>, <rientjes@google.com>,
	<jiaqiyan@google.com>, <Jon.Grimm@amd.com>,
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Subject: Re: [PATCH 7/8] cxl/memfeature: Add CXL memory device soft PPR control feature
Date: Fri, 7 Mar 2025 09:04:55 +0800	[thread overview]
Message-ID: <20250307090455.00001767@huawei.com> (raw)
In-Reply-To: <20250227223816.2036-8-shiju.jose@huawei.com>

On Thu, 27 Feb 2025 22:38:14 +0000
<shiju.jose@huawei.com> wrote:

> From: Shiju Jose <shiju.jose@huawei.com>
> 
> Post Package Repair (PPR) maintenance operations may be supported by CXL
> devices that implement CXL.mem protocol. A PPR maintenance operation
> requests the CXL device to perform a repair operation on its media.
> For example, a CXL device with DRAM components that support PPR features
> may implement PPR Maintenance operations. DRAM components may support two
> types of PPR, hard PPR (hPPR), for a permanent row repair, and Soft PPR
> (sPPR), for a temporary row repair. Soft PPR is much faster than hPPR,
> but the repair is lost with a power cycle.
> 
> During the execution of a PPR Maintenance operation, a CXL memory device:
> - May or may not retain data
> - May or may not be able to process CXL.mem requests correctly, including
> the ones that target the DPA involved in the repair.
> These CXL Memory Device capabilities are specified by Restriction Flags
> in the sPPR Feature and hPPR Feature.
> 
> Soft PPR maintenance operation may be executed at runtime, if data is
> retained and CXL.mem requests are correctly processed. For CXL devices with
> DRAM components, hPPR maintenance operation may be executed only at boot
> because typically data may not be retained with hPPR maintenance operation.
> 
> When a CXL device identifies error on a memory component, the device
> may inform the host about the need for a PPR maintenance operation by using
> an Event Record, where the Maintenance Needed flag is set. The Event Record
> specifies the DPA that should be repaired. A CXL device may not keep track
> of the requests that have already been sent and the information on which
> DPA should be repaired may be lost upon power cycle.
> The userspace tool requests for maintenance operation if the number of
> corrected error reported on a CXL.mem media exceeds error threshold.
> 
> CXL spec 3.2 section 8.2.10.7.1.2 describes the device's sPPR (soft PPR)
> maintenance operation and section 8.2.10.7.1.3 describes the device's
> hPPR (hard PPR) maintenance operation feature.
> 
> CXL spec 3.2 section 8.2.10.7.2.1 describes the sPPR feature discovery and
> configuration.
> 
> CXL spec 3.2 section 8.2.10.7.2.2 describes the hPPR feature discovery and
> configuration.
> 
> Add support for controlling CXL memory device soft PPR (sPPR) feature.
> Register with EDAC driver, which gets the memory repair attr descriptors
> from the EDAC memory repair driver and exposes sysfs repair control
> attributes for PRR to the userspace. For example CXL PPR control for the
> CXL mem0 device is exposed in /sys/bus/edac/devices/cxl_mem0/mem_repairX/
> 
> Add checks to ensure the memory to be repaired is offline and originates
> from a CXL DRAM or CXL gen_media error record reported in the current boot,
> before requesting a PPR operation on the device.
> 
> Tested with QEMU patch for CXL PPR feature.
> https://lore.kernel.org/all/20240730045722.71482-1-dave@stgolabs.net/
> 
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>




  reply	other threads:[~2025-03-07  1:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-27 22:38 [PATCH 0/8] cxl: support CXL memory RAS features shiju.jose
2025-02-27 22:38 ` [PATCH 1/8] cxl: Add helper function to retrieve a feature entry shiju.jose
2025-03-07  0:55   ` Jonathan Cameron
2025-03-07  1:58   ` Fan Ni
2025-03-07 19:19   ` Alison Schofield
2025-03-10 18:15     ` Shiju Jose
2025-03-10 20:28       ` Alison Schofield
2025-03-11  9:51         ` Shiju Jose
2025-02-27 22:38 ` [PATCH 2/8] cxl/memfeature: Add CXL memory device patrol scrub control feature shiju.jose
2025-03-07  1:39   ` Dan Williams
2025-03-07 19:53   ` Alison Schofield
2025-02-27 22:38 ` [PATCH 3/8] cxl/memfeature: Add CXL memory device ECS " shiju.jose
2025-03-07  1:01   ` Jonathan Cameron
2025-03-07  2:46   ` Fan Ni
2025-03-08  1:48   ` Alison Schofield
2025-02-27 22:38 ` [PATCH 4/8] cxl/mbox: Add support for PERFORM_MAINTENANCE mailbox command shiju.jose
2025-02-27 22:38 ` [PATCH 5/8] cxl/region: Add helper function to determine memory is online shiju.jose
2025-03-07 22:01   ` Alison Schofield
2025-02-27 22:38 ` [PATCH 6/8] cxl: Support for finding memory operation attributes from the current boot shiju.jose
2025-03-08  2:09   ` Alison Schofield
2025-02-27 22:38 ` [PATCH 7/8] cxl/memfeature: Add CXL memory device soft PPR control feature shiju.jose
2025-03-07  1:04   ` Jonathan Cameron [this message]
2025-02-27 22:38 ` [PATCH 8/8] cxl/memfeature: Add CXL memory device memory sparing " shiju.jose
2025-03-07  1:11   ` Jonathan Cameron
2025-03-07 23:32     ` Alison Schofield
2025-03-08  2:35   ` Alison Schofield

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