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From: Borislav Petkov <bp@alien8.de>
To: Rik van Riel <riel@surriel.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
	peterz@infradead.org, dave.hansen@linux.intel.com,
	zhengqi.arch@bytedance.com, nadav.amit@gmail.com,
	thomas.lendacky@amd.com, kernel-team@meta.com,
	linux-mm@kvack.org, akpm@linux-foundation.org,
	jackmanb@google.com, jannh@google.com, mhklinux@outlook.com,
	andrew.cooper3@citrix.com, Manali Shukla <Manali.Shukla@amd.com>
Subject: Re: [PATCH v11 05/12] x86/mm: add INVLPGB support code
Date: Wed, 19 Feb 2025 13:04:41 +0100	[thread overview]
Message-ID: <20250219120441.GNZ7XI2aWWUmXh2H2m@fat_crate.local> (raw)
In-Reply-To: <20250213161423.449435-6-riel@surriel.com>

On Thu, Feb 13, 2025 at 11:13:56AM -0500, Rik van Riel wrote:
> Add invlpgb.h with the helper functions and definitions needed to use
> broadcast TLB invalidation on AMD EPYC 3 and newer CPUs.
> 
> Signed-off-by: Rik van Riel <riel@surriel.com>
> Tested-by: Manali Shukla <Manali.Shukla@amd.com>
> Tested-by: Brendan Jackman <jackmanb@google.com>
> Tested-by: Michael Kelley <mhklinux@outlook.com>
> ---
>  arch/x86/include/asm/disabled-features.h |   8 +-
>  arch/x86/include/asm/invlpgb.h           | 101 +++++++++++++++++++++++
>  arch/x86/include/asm/tlbflush.h          |   1 +
>  3 files changed, 109 insertions(+), 1 deletion(-)
>  create mode 100644 arch/x86/include/asm/invlpgb.h
> 
> diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
> index c492bdc97b05..625a89259968 100644
> --- a/arch/x86/include/asm/disabled-features.h
> +++ b/arch/x86/include/asm/disabled-features.h
> @@ -129,6 +129,12 @@
>  #define DISABLE_SEV_SNP		(1 << (X86_FEATURE_SEV_SNP & 31))
>  #endif
>  
> +#ifdef CONFIG_X86_BROADCAST_TLB_FLUSH
> +#define DISABLE_INVLPGB		0
> +#else
> +#define DISABLE_INVLPGB		(1 << (X86_FEATURE_INVLPGB & 31))
> +#endif
> +

What does that bring you really in savings?

>  /*
>   * Make sure to add features to the correct mask
>   */
> @@ -146,7 +152,7 @@
>  #define DISABLED_MASK11	(DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
>  			 DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
>  #define DISABLED_MASK12	(DISABLE_FRED|DISABLE_LAM)
> -#define DISABLED_MASK13	0
> +#define DISABLED_MASK13	(DISABLE_INVLPGB)
>  #define DISABLED_MASK14	0
>  #define DISABLED_MASK15	0
>  #define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
> diff --git a/arch/x86/include/asm/invlpgb.h b/arch/x86/include/asm/invlpgb.h
> new file mode 100644
> index 000000000000..a1d5dedd5217
> --- /dev/null
> +++ b/arch/x86/include/asm/invlpgb.h

I remember asking you to add all that gunk to arch/x86/include/asm/tlb.h.
Please do so.

> +#define INVLPGB_VA			BIT(0)
> +#define INVLPGB_PCID			BIT(1)
> +#define INVLPGB_ASID			BIT(2)
> +#define INVLPGB_INCLUDE_GLOBAL		BIT(3)
> +#define INVLPGB_FINAL_ONLY		BIT(4)
> +#define INVLPGB_INCLUDE_NESTED		BIT(5)
> +
> +/* Flush all mappings for a given pcid and addr, not including globals. */
> +static inline void invlpgb_flush_user(unsigned long pcid,
> +				      unsigned long addr)

Please drop this unused function.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette


  parent reply	other threads:[~2025-02-19 12:05 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-13 16:13 [PATCH v11 00/12] AMD broadcast TLB invalidation Rik van Riel
2025-02-13 16:13 ` [PATCH v11 01/12] x86/mm: make MMU_GATHER_RCU_TABLE_FREE unconditional Rik van Riel
2025-02-13 16:13 ` [PATCH v11 02/12] x86/mm: remove pv_ops.mmu.tlb_remove_table call Rik van Riel
2025-02-13 16:13 ` [PATCH v11 03/12] x86/mm: consolidate full flush threshold decision Rik van Riel
2025-02-14 18:07   ` Dave Hansen
2025-02-19 11:21   ` Borislav Petkov
2025-02-13 16:13 ` [PATCH v11 04/12] x86/mm: get INVLPGB count max from CPUID Rik van Riel
2025-02-14 18:16   ` Dave Hansen
2025-02-19 11:56   ` Borislav Petkov
2025-02-19 17:52     ` Rik van Riel
2025-02-19 18:23       ` Borislav Petkov
2025-02-19 19:26       ` Dave Hansen
2025-02-13 16:13 ` [PATCH v11 05/12] x86/mm: add INVLPGB support code Rik van Riel
2025-02-14 18:22   ` Dave Hansen
2025-02-18 17:23     ` Rik van Riel
2025-02-19 12:04   ` Borislav Petkov [this message]
2025-02-19 17:42     ` Rik van Riel
2025-02-19 19:01       ` Dave Hansen
2025-02-19 19:15         ` Borislav Petkov
2025-02-20  2:49           ` Rik van Riel
2025-02-20 10:23             ` Borislav Petkov
2025-02-13 16:13 ` [PATCH v11 06/12] x86/mm: use INVLPGB for kernel TLB flushes Rik van Riel
2025-02-14 18:35   ` Dave Hansen
2025-02-14 19:40     ` Peter Zijlstra
2025-02-14 19:55       ` Dave Hansen
2025-02-15  1:25         ` Rik van Riel
2025-02-15  2:08           ` Yosry Ahmed
2025-02-18 18:00             ` Rik van Riel
2025-02-18 22:27               ` Dave Hansen
2025-02-19  1:46                 ` Yosry Ahmed
2025-02-13 16:13 ` [PATCH v11 07/12] x86/mm: use INVLPGB in flush_tlb_all Rik van Riel
2025-02-14 18:57   ` Dave Hansen
2025-02-13 16:13 ` [PATCH v11 08/12] x86/mm: use broadcast TLB flushing for page reclaim TLB flushing Rik van Riel
2025-02-14 18:51   ` Dave Hansen
2025-02-18 19:31     ` Rik van Riel
2025-02-18 19:46       ` Dave Hansen
2025-02-18 20:06         ` Rik van Riel
2025-02-13 16:14 ` [PATCH v11 09/12] x86/mm: enable broadcast TLB invalidation for multi-threaded processes Rik van Riel
2025-02-14 19:53   ` Dave Hansen
2025-02-17 13:22     ` Brendan Jackman
2025-02-20 15:25     ` Rik van Riel
2025-02-13 16:14 ` [PATCH v11 10/12] x86/mm: do targeted broadcast flushing from tlbbatch code Rik van Riel
2025-02-13 16:14 ` [PATCH v11 11/12] x86/mm: enable AMD translation cache extensions Rik van Riel
2025-02-13 16:14 ` [PATCH v11 12/12] x86/mm: only invalidate final translations with INVLPGB Rik van Riel
2025-02-13 18:31 ` [PATCH v11 00/12] AMD broadcast TLB invalidation Brendan Jackman
2025-02-13 18:38   ` Brendan Jackman
2025-02-13 20:02   ` Rik van Riel
2025-02-14  9:36     ` Peter Zijlstra
2025-02-14  9:54       ` Brendan Jackman

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