From: Rik van Riel <riel@surriel.com>
To: x86@kernel.org
Cc: linux-kernel@vger.kernel.org, bp@alien8.de, peterz@infradead.org,
dave.hansen@linux.intel.com, zhengqi.arch@bytedance.com,
nadav.amit@gmail.com, thomas.lendacky@amd.com,
kernel-team@meta.com, linux-mm@kvack.org,
akpm@linux-foundation.org, jackmanb@google.com, jannh@google.com,
mhklinux@outlook.com, andrew.cooper3@citrix.com,
Rik van Riel <riel@surriel.com>,
Manali Shukla <Manali.Shukla@amd.com>
Subject: [PATCH v10 08/12] x86/mm: use broadcast TLB flushing for page reclaim TLB flushing
Date: Tue, 11 Feb 2025 16:08:03 -0500 [thread overview]
Message-ID: <20250211210823.242681-9-riel@surriel.com> (raw)
In-Reply-To: <20250211210823.242681-1-riel@surriel.com>
In the page reclaim code, we only track the CPU(s) where the TLB needs
to be flushed, rather than all the individual mappings that may be getting
invalidated.
Use broadcast TLB flushing when that is available.
Signed-off-by: Rik van Riel <riel@surriel.com>
Tested-by: Manali Shukla <Manali.Shukla@amd.com>
Tested-by: Brendan Jackman <jackmanb@google.com>
---
arch/x86/mm/tlb.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 62b4eaf4e851..55c922083aa2 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -1316,7 +1316,9 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
* a local TLB flush is needed. Optimize this use-case by calling
* flush_tlb_func_local() directly in this case.
*/
- if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids) {
+ if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) {
+ invlpgb_flush_all_nonglobals();
+ } else if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids) {
flush_tlb_multi(&batch->cpumask, info);
} else if (cpumask_test_cpu(cpu, &batch->cpumask)) {
lockdep_assert_irqs_enabled();
--
2.47.1
next prev parent reply other threads:[~2025-02-11 21:09 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 21:07 [PATCH v10 00/12] AMD broadcast TLB invalidation Rik van Riel
2025-02-11 21:07 ` [PATCH v10 01/12] x86/mm: make MMU_GATHER_RCU_TABLE_FREE unconditional Rik van Riel
2025-02-11 21:07 ` [PATCH v10 02/12] x86/mm: remove pv_ops.mmu.tlb_remove_table call Rik van Riel
2025-02-11 21:07 ` [PATCH v10 03/12] x86/mm: consolidate full flush threshold decision Rik van Riel
2025-02-11 21:07 ` [PATCH v10 04/12] x86/mm: get INVLPGB count max from CPUID Rik van Riel
2025-02-11 21:08 ` [PATCH v10 05/12] x86/mm: add INVLPGB support code Rik van Riel
2025-02-11 21:08 ` [PATCH v10 06/12] x86/mm: use INVLPGB for kernel TLB flushes Rik van Riel
2025-02-11 21:08 ` [PATCH v10 07/12] x86/mm: use INVLPGB in flush_tlb_all Rik van Riel
2025-02-11 21:08 ` Rik van Riel [this message]
2025-02-11 21:08 ` [PATCH v10 09/12] x86/mm: enable broadcast TLB invalidation for multi-threaded processes Rik van Riel
2025-02-12 9:54 ` Peter Zijlstra
2025-02-12 10:22 ` Peter Zijlstra
2025-02-12 10:42 ` Peter Zijlstra
2025-02-12 12:07 ` Nadav Amit
2025-02-12 13:28 ` Brendan Jackman
2025-02-11 21:08 ` [PATCH v10 10/12] x86/mm: do targeted broadcast flushing from tlbbatch code Rik van Riel
2025-02-12 13:32 ` Brendan Jackman
2025-02-11 21:08 ` [PATCH v10 11/12] x86/mm: enable AMD translation cache extensions Rik van Riel
2025-02-11 21:08 ` [PATCH v10 12/12] x86/mm: only invalidate final translations with INVLPGB Rik van Riel
2025-02-12 10:23 ` [PATCH v10 00/12] AMD broadcast TLB invalidation Peter Zijlstra
2025-02-12 10:44 ` Brendan Jackman
2025-02-12 10:59 ` Peter Zijlstra
2025-02-12 15:39 ` Rik van Riel
2025-02-13 13:03 ` Borislav Petkov
2025-02-12 16:30 ` Sean Christopherson
2025-02-12 20:35 ` Michael Kelley
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