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Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.98 #2 (Red Hat Linux)) id 1tho6r-000000010no-47SF; Tue, 11 Feb 2025 11:07:22 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 8ED043004AF; Tue, 11 Feb 2025 12:07:21 +0100 (CET) Date: Tue, 11 Feb 2025 12:07:21 +0100 From: Peter Zijlstra To: Brendan Jackman Cc: Rik van Riel , x86@kernel.org, linux-kernel@vger.kernel.org, bp@alien8.de, dave.hansen@linux.intel.com, zhengqi.arch@bytedance.com, nadav.amit@gmail.com, thomas.lendacky@amd.com, kernel-team@meta.com, linux-mm@kvack.org, akpm@linux-foundation.org, jannh@google.com, mhklinux@outlook.com, andrew.cooper3@citrix.com, Manali Shukla Subject: Re: [PATCH v9 01/12] x86/mm: make MMU_GATHER_RCU_TABLE_FREE unconditional Message-ID: <20250211110721.GF29593@noisy.programming.kicks-ass.net> References: <20250206044346.3810242-1-riel@surriel.com> <20250206044346.3810242-2-riel@surriel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Stat-Signature: kfioh3zttgtzbkckyo3f7uk8bsf9jcz1 X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 09D34C0003 X-Rspam-User: X-HE-Tag: 1739272049-346151 X-HE-Meta: U2FsdGVkX18HOAT4g5TIlrrDmAsJB5emLQoqB9/SU65Uxbc1QIaq1WBnfsPW24aV3EKQuzchgXfXw+GT2xVSEDa4Dy8dE2t7FK8teUy/uaZZb9M9bqhCjss+03Cehv+oZIhnXy7BGNeLnwFuiZVq2VNlnzQbpmqhWsPdNq9NG3wA+xQUB/hiMJpHir67OK/1irJKfLo0RzLzex57wm2qefCr8Ifn/LhR5EwlWoy2/xZLDUbp1hB8Z3Z6L8GsY/DtewFDIpb2JuqBHY4gCDMpUsLrqokrupKtbYCSusJ+Me99hJTsgkFRL7ThaeY2DdKBbP9iniL1sHwRsXmdl9LynJuiPFzrzRGOK9tyEi5LpAtsgNEOHe/x1gIhH/wy+L38259eYGw3ZGMnt0KP8k7BEF0qcGsrDcso41Cr+EQLTO6UWbCVjxHNrN3SI6LZaqtFUNfSeyTciflfqSYACXL/TopsulOavpG+Mskju5OPEm2PVlQBn4A/vWsHilIExJbdwf19hrRc807acMLCSp2ADIEw7yU4y5DTH1v8g5WwO30CAx7gIY2u7PTNSO57rhdhfFhrwL2tAJCm++p60PZP7mIx1U7HWiWPZstv1EQBUNdx3LHCptb2hQ8+TB09LVOR7t8vOQ7B7Z7zgmzqMYnyba+GDQkhbzi8tHD4Q3Ov3NBt+eUsWSggVR7/Kdieg38tUadhNLJVcZ2SF3i1AgP8sXsnYa49D/hNwHZzrHvF1poqAHBuHuaV5D5vpciNpXUo/kng+6jAUg06Jwx14XvvaTkjTAoy5MKO587cf/WtQUz3I9yKAGAKTMltzzmkhQyfgRR8X9ZFJXP/Ntxb/9xOZnPlEkZKaMdAjfId3eUb9hIL/i1GvYtJxDdrKd5RplH4n5gkk9Xj1zNV3PAlGXFDNr4uYa6g35k+88pOTYwUYQxZ+ZrdMQie3+3yigjRr/20rGjod1TIRQjt1MQ//v6 egK/aCKV NTjyYR9ZkUraLASWRya2BbuRIxP0g+NcxGsgf9+xfHbxbYZ/2YkAjp3/1Dy724Zt1LQT1ipOXNTIb4VoO/wPEP24tBLDasFHPppt5M3uiwnwjnkt5OVdcP5siIuURERgVE9zLHaUyExi+JJtQidmqHYm5CyS2lbttHOnYAeHZTRNc8sFECU4ineiZIWLbclVICU6rvY49uhg/LQZN+YsFreX30ObaFdSn2+0Df3wHOQNK5Vzr0ps9YXxfrCJPoQ7pThMyZhiND43YUEPukJ60v2QoNisrxEeFYHKco4vP/qPMiodwFfpwRML7Gp+KPDCZ25F4d1nUYXGEemkEV3veQrqYlkzm9Mtx4iiwQC6gvhAUILFNNVfTYfwpmg== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Fri, Feb 07, 2025 at 03:28:31PM +0100, Brendan Jackman wrote: > Hi Rik, > > On Thu, 6 Feb 2025 at 05:45, Rik van Riel wrote: > > This is done because some paravirt TLB flush implementations > > handle the TLB flush in the hypervisor, and will do the flush > > even when the target CPU has interrupts disabled. > > > > Always handle page table freeing with MMU_GATHER_RCU_TABLE_FREE. > > Using RCU synchronization between page table freeing and get_user_pages_fast() > > allows bare metal to also do TLB flushing while interrupts are disabled. > > > > Various places in the mm do still block IRQs or disable preemption > > as an implicit way to block RCU frees. > > > > That makes it safe to use INVLPGB on AMD CPUs. > > It would be nice to update the CONFIG_MMU_GATHER_RCU_TABLE_FREE > comment in mm/mmu_gather.c to mention INVLPG alongside "Architectures > that do not have this (PPC)" Why? This is just one more architecture that does broadcast. - and while that's being updated it would > also be useful to note down the paravirt thing you explained above, > IMO it's pretty helpful to have more examples of the concrete usecases > for this logic. Look at kvm_flush_tlb_multi() if you're interested. The notable detail is that is avoids flushing TLB for vCPUs that are preempted, and instead lets the vCPU resume code do the invalidate.