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d=hostedemail.com; s=arc-20220608; t=1736697341; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sOiwDzUcJmcySWabyvYzZaW6UaPMP6se+kpAPen0v7I=; b=36EqEk00eht8XieXl1/1FmPTzzP6BXaMmWVVXGeVuPjfkdCeIXyA/kqzud5N5m87x/Kh8q x8NwLkzMNcF+8fjOOJb4LjX9+J4cOxkhODPoU1PoTenvzVxOPWm0e3i+nc0PNKT1eGx8iI ohw8TvYuCkkAmpibc9ZfVK18REtN9To= Received: from fangorn.home.surriel.com ([10.0.13.7]) by shelob.surriel.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.97.1) (envelope-from ) id 1tX0Ii-0000000010W-2ujL; Sun, 12 Jan 2025 10:54:56 -0500 From: Rik van Riel To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, bp@alien8.de, peterz@infradead.org, dave.hansen@linux.intel.com, zhengqi.arch@bytedance.com, nadav.amit@gmail.com, thomas.lendacky@amd.com, kernel-team@meta.com, linux-mm@kvack.org, akpm@linux-foundation.org, jannh@google.com, Rik van Riel Subject: [PATCH v4 04/12] x86/mm: get INVLPGB count max from CPUID Date: Sun, 12 Jan 2025 10:53:48 -0500 Message-ID: <20250112155453.1104139-5-riel@surriel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250112155453.1104139-1-riel@surriel.com> References: <20250112155453.1104139-1-riel@surriel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 03C5D100009 X-Stat-Signature: i67p785cfotognu43yp9zt5jjkxrchhu X-Rspam-User: X-Rspamd-Server: rspam09 X-HE-Tag: 1736697340-822753 X-HE-Meta: U2FsdGVkX19CFeuApN4j8UTk3ZnXw+oBc4S9ld55crYDA6hGCcr94PME8LjSMcOQkpILyF50W4ZANN8f4gljNFGBFZE+1qLAUTO6uHY0vnMSAKdHTxfM+4+ssNG4emZbzGghLczsWMYC5bDQMvr+5MLJpIQDtnRdlYmCGC30Pu+88LGp9j3DRR0+RV5GnTM1RvVrWFtUJMMaRHrGmCg+o81CXvTuKH82e5W6h1QrE+Q6+NRQwfRkqqHcgMGSTbJA1//s+hXDUxavBBVwRoMEJNsbp457jEzzaSxIvB+ZJOuGjJsIzK8egHkCNfzrd76KIjz7N2XauS4UdHyekwza413II+In8pqInCLWixc2BrcSmtl+F61Of9N7qjXyrISUkw2lhfFJzV3egb34j8bofNfX1ExHYu2MUfvWzmrHlEYLV7uSl4Sy1hCaFVMu8NirZlo3qhFwMouOM7oWAArsoGyxMQ8CpZm/BCyxfq8UV2aDcwFSbT7NUhVzOFOrhyx+FniutPSpyUaXomxbo2UjFzjCyMg67YMPOFdxVvwvOGoGAQ8FSO0M6bn7cgWEy2Z+dklPM0x4+DixJ4mDxMDJILGo4HPgSVPQy7EQjPbCzOM20m6T4PEUbNl02ksLoz0BJIfNQSUiprAY9DdJEBKTlrb49oJJKTjl9H/uJIT8PhdyKkVSYThwa6qvnNMIRv0AWAlXqa553dvpAy5N7GIExNbdL0xBQuCfthCAYtCIIB5xqOmC3ZwkUMU4W9eHZtaN2pv0Bzh1oYJJD6nkcognXPIgeYWctRVbb02+ywcV77YTkiX+jhkN8YLfgSkxFdUls3zX5BHXKbUga+hnscQPHJ5w2D7Xdr9IQj6rLGSZwqQ1TeXj+3/xXtNv6Sv4MxUgONlNfy2brtXzg7dulqkzJzOc6mwDAeQNNdLq2pAr2a1DeryQn6jJWfCulBeokl46VcF3RwXVjpXXnDXgbyJ AmPLZCPb fq2G/IPvr+/nP5T2pSZdlj9o/p60ApX4OOlEoOwDQ1UOtYDd6SWvXqYXFrac9URFWB9ywt81ra/fRFS2rbr6lUESigrdHMqxErSoyDMwfGJs8tLv1BQfRLMSJZre8UCWg/TU1XP9ECNj3jsT9mcBiIRmDo7yxyI02Bz2xmOCZ/68Jr2Nzd8z8AiJF2xBASkLYQyREA5gKQsCyv19/HZgVeF6QBuKq682xfiSzkDT0WvvBdbKTG6j8a0bQLRJb+yodmhB8xJno0YqYLYyKVNMCrcUGSfXhY+EAh30NiXur+0sa9vuglg/By/olHLXK6US18xuAXT97GhVMaZw3aXOeMSnpQfU7wwVVjRfllxmzBNvLcyJme0v7/3hqzDyhe6BXTozXAubFb/Fu7EY= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: The CPU advertises the maximum number of pages that can be shot down with one INVLPGB instruction in the CPUID data. Save that information for later use. Signed-off-by: Rik van Riel --- arch/x86/Kconfig.cpu | 5 +++++ arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/tlbflush.h | 7 +++++++ arch/x86/kernel/cpu/amd.c | 8 ++++++++ 4 files changed, 21 insertions(+) diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index 2a7279d80460..bacdc502903f 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -395,6 +395,10 @@ config X86_VMX_FEATURE_NAMES def_bool y depends on IA32_FEAT_CTL +config X86_BROADCAST_TLB_FLUSH + def_bool y + depends on CPU_SUP_AMD + menuconfig PROCESSOR_SELECT bool "Supported processor vendors" if EXPERT help @@ -431,6 +435,7 @@ config CPU_SUP_CYRIX_32 config CPU_SUP_AMD default y bool "Support AMD processors" if PROCESSOR_SELECT + select X86_BROADCAST_TLB_FLUSH help This enables detection, tunings and quirks for AMD processors diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 17b6590748c0..f9b832e971c5 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -338,6 +338,7 @@ #define X86_FEATURE_CLZERO (13*32+ 0) /* "clzero" CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* "irperf" Instructions Retired Count */ #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */ +#define X86_FEATURE_INVLPGB (13*32+ 3) /* INVLPGB and TLBSYNC instruction supported. */ #define X86_FEATURE_RDPRU (13*32+ 4) /* "rdpru" Read processor register at user level */ #define X86_FEATURE_WBNOINVD (13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */ #define X86_FEATURE_AMD_IBPB (13*32+12) /* Indirect Branch Prediction Barrier */ diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 02fc2aa06e9e..8fe3b2dda507 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -183,6 +183,13 @@ static inline void cr4_init_shadow(void) extern unsigned long mmu_cr4_features; extern u32 *trampoline_cr4_features; +/* How many pages can we invalidate with one INVLPGB. */ +#ifdef CONFIG_X86_BROADCAST_TLB_FLUSH +extern u16 invlpgb_count_max; +#else +#define invlpgb_count_max 1 +#endif + extern void initialize_tlbstate_and_flush(void); /* diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 79d2e17f6582..bcf73775b4f8 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -29,6 +29,8 @@ #include "cpu.h" +u16 invlpgb_count_max __ro_after_init; + static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) { u32 gprs[8] = { 0 }; @@ -1135,6 +1137,12 @@ static void cpu_detect_tlb_amd(struct cpuinfo_x86 *c) tlb_lli_2m[ENTRIES] = eax & mask; tlb_lli_4m[ENTRIES] = tlb_lli_2m[ENTRIES] >> 1; + + /* Max number of pages INVLPGB can invalidate in one shot */ + if (boot_cpu_has(X86_FEATURE_INVLPGB)) { + cpuid(0x80000008, &eax, &ebx, &ecx, &edx); + invlpgb_count_max = (edx & 0xffff) + 1; + } } static const struct cpu_dev amd_cpu_dev = { -- 2.47.1