From: Rik van Riel <riel@surriel.com>
To: x86@kernel.org
Cc: linux-kernel@vger.kernel.org, kernel-team@meta.com,
dave.hansen@linux.intel.com, luto@kernel.org,
peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, hpa@zytor.com, akpm@linux-foundation.org,
linux-mm@kvack.org, Rik van Riel <riel@surriel.com>
Subject: [PATCH 05/11] x86/mm: use INVLPGB for kernel TLB flushes
Date: Sun, 22 Dec 2024 21:55:11 -0500 [thread overview]
Message-ID: <20241223025751.3268975-6-riel@surriel.com> (raw)
In-Reply-To: <20241223025751.3268975-1-riel@surriel.com>
Use broadcast TLB invalidation for kernel addresses when available.
This stops us from having to send IPIs for kernel TLB flushes.
Signed-off-by: Rik van Riel <riel@surriel.com>
---
arch/x86/mm/tlb.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 6cf881a942bb..29207dc5b807 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -1077,6 +1077,32 @@ void flush_tlb_all(void)
on_each_cpu(do_flush_tlb_all, NULL, 1);
}
+static void broadcast_kernel_range_flush(unsigned long start, unsigned long end)
+{
+ unsigned long addr;
+ unsigned long maxnr = invlpgb_count_max;
+ unsigned long threshold = tlb_single_page_flush_ceiling * maxnr;
+
+ /*
+ * TLBSYNC only waits for flushes originating on the same CPU.
+ * Disabling migration allows us to wait on all flushes.
+ */
+ guard(preempt)();
+
+ if (end == TLB_FLUSH_ALL ||
+ (end - start) > threshold << PAGE_SHIFT) {
+ invlpgb_flush_all();
+ } else {
+ unsigned long nr;
+ for (addr = start; addr < end; addr += nr << PAGE_SHIFT) {
+ nr = min((end - addr) >> PAGE_SHIFT, maxnr);
+ invlpgb_flush_addr(addr, nr);
+ }
+ }
+
+ tlbsync();
+}
+
static void do_kernel_range_flush(void *info)
{
struct flush_tlb_info *f = info;
@@ -1089,6 +1115,11 @@ static void do_kernel_range_flush(void *info)
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
{
+ if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) {
+ broadcast_kernel_range_flush(start, end);
+ return;
+ }
+
/* Balance as user space task's flush, a bit conservative */
if (end == TLB_FLUSH_ALL ||
(end - start) > tlb_single_page_flush_ceiling << PAGE_SHIFT) {
--
2.47.1
next prev parent reply other threads:[~2024-12-23 3:04 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-23 2:55 [RFC PATCH v2 00/11] AMD broadcast TLB invalidation Rik van Riel
2024-12-23 2:55 ` [PATCH 01/11] x86/mm: make MMU_GATHER_RCU_TABLE_FREE unconditional Rik van Riel
2024-12-23 6:01 ` Qi Zheng
2024-12-23 20:20 ` Rik van Riel
2024-12-24 18:26 ` Peter Zijlstra
2024-12-23 2:55 ` [PATCH 02/11] x86/mm: add X86_FEATURE_INVLPGB definition Rik van Riel
2024-12-23 2:55 ` [PATCH 03/11] x86/mm: get INVLPGB count max from CPUID Rik van Riel
2024-12-25 23:42 ` Nadav Amit
2024-12-23 2:55 ` [PATCH 04/11] x86/mm: add INVLPGB support code Rik van Riel
2024-12-23 2:55 ` Rik van Riel [this message]
2024-12-23 2:55 ` [PATCH 06/11] x86/tlb: use INVLPGB in flush_tlb_all Rik van Riel
2024-12-23 2:55 ` [PATCH 07/11] x86/mm: use broadcast TLB flushing for page reclaim TLB flushing Rik van Riel
2024-12-23 2:55 ` [PATCH 08/11] x86/mm: enable broadcast TLB invalidation for multi-threaded processes Rik van Riel
2024-12-25 23:22 ` Nadav Amit
2024-12-25 23:32 ` Nadav Amit
2024-12-23 2:55 ` [PATCH 09/11] x86,tlb: do targeted broadcast flushing from tlbbatch code Rik van Riel
2024-12-23 2:55 ` [PATCH 10/11] x86/mm: enable AMD translation cache extensions Rik van Riel
2024-12-23 2:55 ` [PATCH 11/11] x86/mm: only invalidate final translations with INVLPGB Rik van Riel
2024-12-24 18:08 ` [RFC PATCH v2 00/11] AMD broadcast TLB invalidation Michael Kelley
2024-12-25 14:48 ` Rik van Riel
2025-01-10 19:29 ` Tom Lendacky
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