From: niliqiang <ni_liqiang@126.com>
To: debug@rivosinc.com
Cc: Liam.Howlett@oracle.com, ajones@ventanamicro.com,
akpm@linux-foundation.org, alexghiti@rivosinc.com,
alistair.francis@wdc.com, andy.chiu@sifive.com,
andybnac@gmail.com, aou@eecs.berkeley.edu, arnd@arndb.de,
atishp@rivosinc.com, bp@alien8.de, brauner@kernel.org,
broonie@kernel.org, carlos.bilbao.osdev@gmail.com,
charlie@rivosinc.com, cleger@rivosinc.com,
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dave.hansen@linux.intel.com, david@redhat.com,
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evan@rivosinc.com, hpa@zytor.com, jim.shu@sifive.com,
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linux-arch@vger.kernel.org, linux-doc@vger.kernel.org,
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linux-kselftest@vger.kernel.org, linux-mm@kvack.org,
linux-riscv@lists.infradead.org, lorenzo.stoakes@oracle.com,
mingo@redhat.com, ni.liqiang@zte.com.cn
Subject: Re: [PATCH v7 00/32] riscv control-flow integrity for usermode
Date: Sun, 8 Dec 2024 23:51:41 +0800 [thread overview]
Message-ID: <20241208155141.21611-1-ni_liqiang@126.com> (raw)
In-Reply-To: <20241029-v5_user_cfi_series-v7-0-2727ce9936cb@rivosinc.com>
> How to test this series
> =======================
I recently built a test environment for RISCV control-flow integrity for
usermode using QEMU, referring to the test instructions in the patch.
I found several problems during the test, and I hope you can answer them.
Thank you.
Q1:
The CFI-related macro definition values in
QEMU(branch: qemu-zicfilp_zicfiss_ratified_master_july11) and
Linux(branch: linux-riscv-cfi-vdso_user_cfi_v6.12-rc1) are inconsistent.
For example, the definition value of PR_GET_SHADOW_STACK_STATUS in QEMU
is 71, but the definition value in Linux is 74.
In order to continue the test, I modified the relevant definitions
in the QEMU and GUN source codes with reference to the Linux source code,
so that the cfi-related macro definitions in the QEMU and GUN source codes
are consistent with Linux.
Q2:
When zicfilp=true is added to the QEMU command to enable landing pad,
after cfitests command is executed, a segmentation fault is prompted,
software check exception is raised, and the value of xtval is 2.
According to the comments in the code, when xtval is 2, there are the
following exceptions.
* An indirect branch doesn't land on 4 byte aligned PC or `lpad`
* instruction or `label` value programmed in `lpad` instr doesn't
* match with value setup in `x7`.
Why do these software check exceptions exist? What should I do to further
troubleshoot or resolve these issues?
The software versions I am using are all the versions mentioned in the
test instructions, and the zicfiss test is in line with expectations.
Can you help me with the above two questions, especially the second one?
thank you very much.
prev parent reply other threads:[~2024-12-08 15:53 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 23:44 Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 01/32] mm: Introduce ARCH_HAS_USER_SHADOW_STACK Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 02/32] mm: helper `is_shadow_stack_vma` to check shadow stack vma Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 03/32] riscv: Enable cbo.zero only when all harts support Zicboz Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 04/32] riscv: Add support for per-thread envcfg CSR values Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 05/32] riscv: Call riscv_user_isa_enable() only on the boot hart Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 06/32] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 07/32] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 08/32] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 09/32] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 10/32] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 11/32] riscv mm: manufacture shadow stack pte Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 12/32] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 13/32] riscv mmu: write protect and shadow stack Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 14/32] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 15/32] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 16/32] prctl: arch-agnostic prctl for shadow stack Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 17/32] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 18/32] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 19/32] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 20/32] riscv/traps: Introduce software check exception Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 21/32] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 22/32] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 23/32] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 24/32] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 25/32] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 26/32] riscv: Add Firmware Feature SBI extensions definitions Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 27/32] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 28/32] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 29/32] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 30/32] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 31/32] riscv: Documentation for shadow stack on riscv Deepak Gupta
2024-10-29 23:44 ` [PATCH v7 32/32] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2024-12-08 15:51 ` niliqiang [this message]
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