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Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Server: rspam03 X-Rspam-User: X-Rspamd-Queue-Id: BC645140004 X-Stat-Signature: 9qds6p494kyhry4ojkc93hosrippzbz9 X-HE-Tag: 1728427138-451829 X-HE-Meta: U2FsdGVkX199QqZjgIVuiRw0regWE7G8Th+FZ83OKpGsWlVw+7WSXYUrsN6lxFOhRMCP6cpJ/6w55DQ5GCjVDsiwnzvdxAz8zADUOW1Zb5j1+g8PZX5aj6jfMojEAaLVpfrBVgqmvVUpO0SY4FFLeVwpD6LVGH4EPc+UQEEV6dcUHAyH1EwIBh1qZz00fL5q1IrwdV+dYYojuS+2PEA4cwRRIUVLUAFFwQXSnbU7knpH3bDlOfcnLbdgQKoRsU3tdV3mCsi262WBKrPXEtlfi1iEuC/c/4yCR8F1s/EuRa2YnBN2k7Y1llC4QTPN/ItbuT56OWGMVxHW6tPlHpduSnAEoscQFldZaxbEx2SkHy50t97mhA9wFqySol5kgI8tambwet/uL9Csh8aJykCXLsDeWaiY3JFkLZ3MC/MDH9v7qzjoGFznwmXIZ7GwX4mToSRdf3RXgA0hqIAUaO5VWqLlbqzMHt6ZN+4ZxPDkGOWoKnf5T9drwROQdoLGHGY7GjzcgKNTTw0oy1MxtyoIZaO/XuU92tEF7zbfxvO5Q4OrrXnD8HG4mkcIeU7zHP7rwTvmfD8M2W2fyKohvNsXAzjKUMFZb8j3ijYtvHvOi9m2Yn6XSmMCrTa6p15cUty5/bnOsLLmd3YAbC6Uv5OkgE1Pj59zvfe7O9k7Ua1F3ulRaepLaLpUKptifyRKxf9/2jGwNwxq7S92zbqrLv4BF9gialC9XQfQpcHwdfYzO4V+DB+0HFuT6iGortJV1Ihq10RZZMCbs8p9vwbsQjmkQMfbQQhPplTMtMX64/5DwPOnmljg2Aw1/rS8WMQsNWDKhr3od1WJ5XUbqMm6nBSpPRk5mysMbu8Ja78DTGZia9yrvFO83NW8N4in2vAHnemvtZ/PSbNsmrvsfEPEgQwqjH5eceqyuQPQvdrxe+4hm/IRkj+8YWlhvrCmpoNpZcctXyOXKL63v4rik3R84Wo 8wAkoYNC rPk+XYENzCB7IuXwEhHCh8awSlcLIf2gO0hQwmmAMIzabjsrU0Q04fNLB70kJ3uFIlHDhXmXtIDMmzIEB9AQyzWcIzSYKL5eyB17XYVozGQq9n66Z3ZrIif7KUqTMSd8mugw+ifppiRFTKuSG2JwlqKFV5LBKk/kFQq4fuYXQmaZNg2KQMg8sy10hmswe5JAL9vsYu8WMmuo2R50XBDVmRcJyO+qyAH4Ah86fQueS9wwo0on3IPRUijhFsL0AgeLACh0F4dexY0vkckM+RumIoSw4aEgfjup6JPo+11rp6+icc525FDVV8CebsgMKyghB2Xl/SXZw9ncvUN4/dhHhoiO90aZjambrL0x57tJyblKjuIYgf8k1nkmsiNU/eqnW1KWGESmB23AvUX2RYD0IRfboDThD5vav8yQ9Q/DeHUCfU/Uh9I67XTn7LNgkOuL/lb1y2TyAWTWRVbLmXPw/8rvE6xTXkyUzCs4hHm3tHl7a3r10ETUZXejyLF4NFvdRoEzCUedmDvUrX70vf4jQCRvWpByynKr9fw66fm9PpVoqNSNh3/gOtr9RqphD+Vf0S+V16Trmc2Cnbdc= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Expose a new register type NT_RISCV_USER_CFI for risc-v cfi status and state. Intentionally both landing pad and shadow stack status and state are rolled into cfi state. Creating two different NT_RISCV_USER_XXX would not be useful and wastage of a note type. Enabling or disabling of feature is not allowed via ptrace set interface. However setting `elp` state or setting shadow stack pointer are allowed via ptrace set interface. It is expected `gdb` might have use to fixup `elp` state or `shadow stack` pointer. Signed-off-by: Deepak Gupta --- arch/riscv/include/uapi/asm/ptrace.h | 18 ++++++++ arch/riscv/kernel/ptrace.c | 83 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 1 + 3 files changed, 102 insertions(+) diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index 659ea3af5680..e6571fba8a8a 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -131,6 +131,24 @@ struct __sc_riscv_cfi_state { unsigned long ss_ptr; /* shadow stack pointer */ }; +struct __cfi_status { + /* indirect branch tracking state */ + __u64 lp_en : 1; + __u64 lp_lock : 1; + __u64 elp_state : 1; + + /* shadow stack status */ + __u64 shstk_en : 1; + __u64 shstk_lock : 1; + + __u64 rsvd : sizeof(__u64) - 5; +}; + +struct user_cfi_state { + struct __cfi_status cfi_status; + __u64 shstk_ptr; +}; + #endif /* __ASSEMBLY__ */ #endif /* _UAPI_ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 92731ff8c79a..c69b20ea6e79 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -19,6 +19,7 @@ #include #include #include +#include enum riscv_regset { REGSET_X, @@ -28,6 +29,9 @@ enum riscv_regset { #ifdef CONFIG_RISCV_ISA_V REGSET_V, #endif +#ifdef CONFIG_RISCV_USER_CFI + REGSET_CFI, +#endif }; static int riscv_gpr_get(struct task_struct *target, @@ -152,6 +156,75 @@ static int riscv_vr_set(struct task_struct *target, } #endif +#ifdef CONFIG_RISCV_USER_CFI +static int riscv_cfi_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + user_cfi.cfi_status.lp_en = is_indir_lp_enabled(target); + user_cfi.cfi_status.lp_lock = is_indir_lp_locked(target); + user_cfi.cfi_status.elp_state = (regs->status & SR_ELP); + + user_cfi.cfi_status.shstk_en = is_shstk_enabled(target); + user_cfi.cfi_status.shstk_lock = is_shstk_locked(target); + user_cfi.shstk_ptr = get_active_shstk(target); + + return membuf_write(&to, &user_cfi, sizeof(user_cfi)); +} + +/* + * Does it make sense to allowing enable / disable of cfi via ptrace? + * Not allowing enable / disable / locking control via ptrace for now. + * Setting shadow stack pointer is allowed. GDB might use it to unwind or + * some other fixup. Similarly gdb might want to suppress elp and may want + * to reset elp state. + */ +static int riscv_cfi_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int ret; + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &user_cfi, 0, -1); + if (ret) + return ret; + + /* + * Not allowing enabling or locking shadow stack or landing pad + * There is no disabling of shadow stack or landing pad via ptrace + * rsvd field should be set to zero so that if those fields are needed in future + */ + if (user_cfi.cfi_status.lp_en || user_cfi.cfi_status.lp_lock || + user_cfi.cfi_status.shstk_en || user_cfi.cfi_status.shstk_lock || + !user_cfi.cfi_status.rsvd) + return -EINVAL; + + /* If lpad is enabled on target and ptrace requests to set / clear elp, do that */ + if (is_indir_lp_enabled(target)) { + if (user_cfi.cfi_status.elp_state) /* set elp state */ + regs->status |= SR_ELP; + else + regs->status &= ~SR_ELP; /* clear elp state */ + } + + /* If shadow stack enabled on target, set new shadow stack pointer */ + if (is_shstk_enabled(target)) + set_active_shstk(target, user_cfi.shstk_ptr); + + return 0; +} +#endif + static const struct user_regset riscv_user_regset[] = { [REGSET_X] = { .core_note_type = NT_PRSTATUS, @@ -182,6 +255,16 @@ static const struct user_regset riscv_user_regset[] = { .set = riscv_vr_set, }, #endif +#ifdef CONFIG_RISCV_USER_CFI + [REGSET_CFI] = { + .core_note_type = NT_RISCV_USER_CFI, + .align = sizeof(__u64), + .n = sizeof(struct user_cfi_state) / sizeof(__u64), + .size = sizeof(__u64), + .regset_get = riscv_cfi_get, + .set = riscv_cfi_set, + } +#endif }; static const struct user_regset_view riscv_user_native_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index b9935988da5c..7ef63b2b67a1 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -450,6 +450,7 @@ typedef struct elf64_shdr { #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */ #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ +#define NT_RISCV_USER_CFI 0x902 /* RISC-V shadow stack state */ #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */ -- 2.45.0