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From: Deepak Gupta <debug@rivosinc.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,  Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	 x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	 Andrew Morton <akpm@linux-foundation.org>,
	 "Liam R. Howlett" <Liam.Howlett@oracle.com>,
	 Vlastimil Babka <vbabka@suse.cz>,
	 Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Arnd Bergmann <arnd@arndb.de>,
	 Christian Brauner <brauner@kernel.org>,
	 Peter Zijlstra <peterz@infradead.org>,
	Oleg Nesterov <oleg@redhat.com>,
	 Eric Biederman <ebiederm@xmission.com>,
	Kees Cook <kees@kernel.org>,  Jonathan Corbet <corbet@lwn.net>,
	Shuah Khan <shuah@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org,
	 linux-mm@kvack.org, linux-riscv@lists.infradead.org,
	 devicetree@vger.kernel.org, linux-arch@vger.kernel.org,
	 linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
	 alistair.francis@wdc.com, richard.henderson@linaro.org,
	jim.shu@sifive.com,  andybnac@gmail.com, kito.cheng@sifive.com,
	charlie@rivosinc.com,  atishp@rivosinc.com, evan@rivosinc.com,
	cleger@rivosinc.com,  alexghiti@rivosinc.com,
	samitolvanen@google.com, broonie@kernel.org,
	 rick.p.edgecombe@intel.com, Deepak Gupta <debug@rivosinc.com>
Subject: [PATCH v6 18/33] prctl: arch-agnostic prctl for indirect branch tracking
Date: Tue, 08 Oct 2024 15:37:00 -0700	[thread overview]
Message-ID: <20241008-v5_user_cfi_series-v6-18-60d9fe073f37@rivosinc.com> (raw)
In-Reply-To: <20241008-v5_user_cfi_series-v6-0-60d9fe073f37@rivosinc.com>

Three architectures (x86, aarch64, riscv) have support for indirect branch
tracking feature in a very similar fashion. On a very high level, indirect
branch tracking is a CPU feature where CPU tracks branches which uses
memory operand to perform control transfer in program. As part of this
tracking on indirect branches, CPU goes in a state where it expects a
landing pad instr on target and if not found then CPU raises some fault
(architecture dependent)

x86 landing pad instr - `ENDBRANCH`
aarch64 landing pad instr - `BTI`
riscv landing instr - `lpad`

Given that three major arches have support for indirect branch tracking,
This patch makes `prctl` for indirect branch tracking arch agnostic.

To allow userspace to enable this feature for itself, following prtcls are
defined:
 - PR_GET_INDIR_BR_LP_STATUS: Gets current configured status for indirect
   branch tracking.
 - PR_SET_INDIR_BR_LP_STATUS: Sets a configuration for indirect branch
   tracking.
   Following status options are allowed
       - PR_INDIR_BR_LP_ENABLE: Enables indirect branch tracking on user
         thread.
       - PR_INDIR_BR_LP_DISABLE; Disables indirect branch tracking on user
         thread.
 - PR_LOCK_INDIR_BR_LP_STATUS: Locks configured status for indirect branch
   tracking for user thread.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
 include/linux/cpu.h        |  4 ++++
 include/uapi/linux/prctl.h | 27 +++++++++++++++++++++++++++
 kernel/sys.c               | 30 ++++++++++++++++++++++++++++++
 3 files changed, 61 insertions(+)

diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index bdcec1732445..eff56aae05d7 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -203,4 +203,8 @@ static inline bool cpu_mitigations_auto_nosmt(void)
 }
 #endif
 
+int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status);
+int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status);
+int arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status);
+
 #endif /* _LINUX_CPU_H_ */
diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
index b8d7b6361754..41ffb53490a4 100644
--- a/include/uapi/linux/prctl.h
+++ b/include/uapi/linux/prctl.h
@@ -349,4 +349,31 @@ struct prctl_mm_map {
  */
 #define PR_LOCK_SHADOW_STACK_STATUS      76
 
+/*
+ * Get the current indirect branch tracking configuration for the current
+ * thread, this will be the value configured via PR_SET_INDIR_BR_LP_STATUS.
+ */
+#define PR_GET_INDIR_BR_LP_STATUS      77
+
+/*
+ * Set the indirect branch tracking configuration. PR_INDIR_BR_LP_ENABLE will
+ * enable cpu feature for user thread, to track all indirect branches and ensure
+ * they land on arch defined landing pad instruction.
+ * x86 - If enabled, an indirect branch must land on `ENDBRANCH` instruction.
+ * arch64 - If enabled, an indirect branch must land on `BTI` instruction.
+ * riscv - If enabled, an indirect branch must land on `lpad` instruction.
+ * PR_INDIR_BR_LP_DISABLE will disable feature for user thread and indirect
+ * branches will no more be tracked by cpu to land on arch defined landing pad
+ * instruction.
+ */
+#define PR_SET_INDIR_BR_LP_STATUS      78
+# define PR_INDIR_BR_LP_ENABLE		   (1UL << 0)
+
+/*
+ * Prevent further changes to the specified indirect branch tracking
+ * configuration.  All bits may be locked via this call, including
+ * undefined bits.
+ */
+#define PR_LOCK_INDIR_BR_LP_STATUS      79
+
 #endif /* _LINUX_PRCTL_H */
diff --git a/kernel/sys.c b/kernel/sys.c
index 3d38a9c7c5c9..dafa31485584 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -2339,6 +2339,21 @@ int __weak arch_lock_shadow_stack_status(struct task_struct *t, unsigned long st
 	return -EINVAL;
 }
 
+int __weak arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status)
+{
+	return -EINVAL;
+}
+
+int __weak arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status)
+{
+	return -EINVAL;
+}
+
+int __weak arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status)
+{
+	return -EINVAL;
+}
+
 #define PR_IO_FLUSHER (PF_MEMALLOC_NOIO | PF_LOCAL_THROTTLE)
 
 #ifdef CONFIG_ANON_VMA_NAME
@@ -2814,6 +2829,21 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
 			return -EINVAL;
 		error = arch_lock_shadow_stack_status(me, arg2);
 		break;
+	case PR_GET_INDIR_BR_LP_STATUS:
+		if (arg3 || arg4 || arg5)
+			return -EINVAL;
+		error = arch_get_indir_br_lp_status(me, (unsigned long __user *) arg2);
+		break;
+	case PR_SET_INDIR_BR_LP_STATUS:
+		if (arg3 || arg4 || arg5)
+			return -EINVAL;
+		error = arch_set_indir_br_lp_status(me, arg2);
+		break;
+	case PR_LOCK_INDIR_BR_LP_STATUS:
+		if (arg3 || arg4 || arg5)
+			return -EINVAL;
+		error = arch_lock_indir_br_lp_status(me, arg2);
+		break;
 	default:
 		error = -EINVAL;
 		break;

-- 
2.45.0



  parent reply	other threads:[~2024-10-08 22:38 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-08 22:36 [PATCH v6 00/33] riscv control-flow integrity for usermode Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 01/33] mm: Introduce ARCH_HAS_USER_SHADOW_STACK Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 02/33] mm: helper `is_shadow_stack_vma` to check shadow stack vma Deepak Gupta
2024-10-09 11:11   ` Mark Brown
2024-10-08 22:36 ` [PATCH v6 03/33] riscv: Enable cbo.zero only when all harts support Zicboz Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 04/33] riscv: Add support for per-thread envcfg CSR values Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 05/33] riscv: Call riscv_user_isa_enable() only on the boot hart Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 06/33] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv Deepak Gupta
2024-10-09 11:28   ` Mark Brown
2024-10-29 22:06     ` Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 07/33] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2024-10-25 21:58   ` Rob Herring (Arm)
2024-10-08 22:36 ` [PATCH v6 08/33] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 09/33] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 10/33] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 11/33] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2024-10-09 13:36   ` Lorenzo Stoakes
2024-10-10  0:02     ` Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 12/33] riscv mm: manufacture shadow stack pte Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 13/33] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 14/33] riscv mmu: write protect and shadow stack Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 15/33] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2024-10-08 22:36 ` [PATCH v6 16/33] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2024-10-08 22:55   ` Edgecombe, Rick P
2024-10-08 23:17     ` Deepak Gupta
2024-10-08 23:31       ` Edgecombe, Rick P
2024-10-09 10:25     ` Mark Brown
2024-10-08 22:36 ` [PATCH v6 17/33] prctl: arch-agnostic prctl for shadow stack Deepak Gupta
2024-10-08 22:37 ` Deepak Gupta [this message]
2024-10-09 11:03   ` [PATCH v6 18/33] prctl: arch-agnostic prctl for indirect branch tracking Mark Brown
2024-10-08 22:37 ` [PATCH v6 19/33] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2024-10-09 12:44   ` Mark Brown
2024-10-08 22:37 ` [PATCH v6 20/33] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 21/33] riscv/traps: Introduce software check exception Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 22/33] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 23/33] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 24/33] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 25/33] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 26/33] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 27/33] riscv: Add Firmware Feature SBI extensions definitions Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 28/33] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 29/33] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 30/33] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 31/33] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 32/33] riscv: Documentation for shadow stack on riscv Deepak Gupta
2024-10-08 22:37 ` [PATCH v6 33/33] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2024-10-11  5:44   ` Zong Li
2024-10-11 10:18     ` Mark Brown
2024-10-11 11:43       ` Zong Li
2024-10-11 19:45         ` Deepak Gupta
2024-10-14 14:33           ` Zong Li
2024-10-09 11:05 ` [PATCH v6 00/33] riscv control-flow integrity for usermode Mark Brown

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