From: Deepak Gupta <debug@rivosinc.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Andrew Morton <akpm@linux-foundation.org>,
"Liam R. Howlett" <Liam.Howlett@oracle.com>,
Vlastimil Babka <vbabka@suse.cz>,
Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Arnd Bergmann <arnd@arndb.de>,
Christian Brauner <brauner@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Oleg Nesterov <oleg@redhat.com>,
Eric Biederman <ebiederm@xmission.com>,
Kees Cook <kees@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
Shuah Khan <shuah@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org,
linux-mm@kvack.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, linux-arch@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
alistair.francis@wdc.com, richard.henderson@linaro.org,
jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com,
charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com,
cleger@rivosinc.com, alexghiti@rivosinc.com,
samitolvanen@google.com, broonie@kernel.org,
rick.p.edgecombe@intel.com, Deepak Gupta <debug@rivosinc.com>
Subject: [PATCH 15/33] riscv/mm: Implement map_shadow_stack() syscall
Date: Tue, 01 Oct 2024 09:06:20 -0700 [thread overview]
Message-ID: <20241001-v5_user_cfi_series-v1-15-3ba65b6e550f@rivosinc.com> (raw)
In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com>
As discussed extensively in the changelog for the addition of this
syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the
existing mmap() and madvise() syscalls do not map entirely well onto the
security requirements for shadow stack memory since they lead to windows
where memory is allocated but not yet protected or stacks which are not
properly and safely initialised. Instead a new syscall map_shadow_stack()
has been defined which allocates and initialises a shadow stack page.
This patch implements this syscall for riscv. riscv doesn't require token
to be setup by kernel because user mode can do that by itself. However to
provide compatibility and portability with other architectues, user mode
can specify token set flag.
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
arch/riscv/kernel/Makefile | 2 +
arch/riscv/kernel/usercfi.c | 145 ++++++++++++++++++++++++++++++++++++++++
include/uapi/asm-generic/mman.h | 4 ++
3 files changed, 151 insertions(+)
diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index 7f88cc4931f5..eb2c94dd0a9d 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -117,3 +117,5 @@ obj-$(CONFIG_COMPAT) += compat_vdso/
obj-$(CONFIG_64BIT) += pi/
obj-$(CONFIG_ACPI) += acpi.o
obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o
+
+obj-$(CONFIG_RISCV_USER_CFI) += usercfi.o
diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c
new file mode 100644
index 000000000000..ce002eabbdc1
--- /dev/null
+++ b/arch/riscv/kernel/usercfi.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Rivos, Inc.
+ * Deepak Gupta <debug@rivosinc.com>
+ */
+
+#include <linux/sched.h>
+#include <linux/bitops.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/uaccess.h>
+#include <linux/sizes.h>
+#include <linux/user.h>
+#include <linux/syscalls.h>
+#include <linux/prctl.h>
+#include <asm/csr.h>
+#include <asm/usercfi.h>
+
+#define SHSTK_ENTRY_SIZE sizeof(void *)
+
+/*
+ * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen
+ * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to
+ * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform writes on shadow
+ * stack.
+ */
+static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned long val)
+{
+ /*
+ * Never expect -1 on shadow stack. Expect return addresses and zero
+ */
+ unsigned long swap = -1;
+
+ __enable_user_access();
+ asm goto(
+ ".option push\n"
+ ".option arch, +zicfiss\n"
+ "1: ssamoswap.d %[swap], %[val], %[addr]\n"
+ _ASM_EXTABLE(1b, %l[fault])
+ RISCV_ACQUIRE_BARRIER
+ ".option pop\n"
+ : [swap] "=r" (swap), [addr] "+A" (*addr)
+ : [val] "r" (val)
+ : "memory"
+ : fault
+ );
+ __disable_user_access();
+ return swap;
+fault:
+ __disable_user_access();
+ return -1;
+}
+
+/*
+ * Create a restore token on the shadow stack. A token is always XLEN wide
+ * and aligned to XLEN.
+ */
+static int create_rstor_token(unsigned long ssp, unsigned long *token_addr)
+{
+ unsigned long addr;
+
+ /* Token must be aligned */
+ if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE))
+ return -EINVAL;
+
+ /* On RISC-V we're constructing token to be function of address itself */
+ addr = ssp - SHSTK_ENTRY_SIZE;
+
+ if (amo_user_shstk((unsigned long __user *)addr, (unsigned long) ssp) == -1)
+ return -EFAULT;
+
+ if (token_addr)
+ *token_addr = addr;
+
+ return 0;
+}
+
+static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size,
+ unsigned long token_offset,
+ bool set_tok)
+{
+ int flags = MAP_ANONYMOUS | MAP_PRIVATE;
+ struct mm_struct *mm = current->mm;
+ unsigned long populate, tok_loc = 0;
+
+ if (addr)
+ flags |= MAP_FIXED_NOREPLACE;
+
+ mmap_write_lock(mm);
+ addr = do_mmap(NULL, addr, size, PROT_READ, flags,
+ VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL);
+ mmap_write_unlock(mm);
+
+ if (!set_tok || IS_ERR_VALUE(addr))
+ goto out;
+
+ if (create_rstor_token(addr + token_offset, &tok_loc)) {
+ vm_munmap(addr, size);
+ return -EINVAL;
+ }
+
+ addr = tok_loc;
+
+out:
+ return addr;
+}
+
+SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsigned int, flags)
+{
+ bool set_tok = flags & SHADOW_STACK_SET_TOKEN;
+ unsigned long aligned_size = 0;
+
+ if (!cpu_supports_shadow_stack())
+ return -EOPNOTSUPP;
+
+ /* Anything other than set token should result in invalid param */
+ if (flags & ~SHADOW_STACK_SET_TOKEN)
+ return -EINVAL;
+
+ /*
+ * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP and is available
+ * CSR in all modes. CSR accesses are performed using 12bit index programmed in instruction
+ * itself. This provides static property on register programming and writes to CSR can't
+ * be unintentional from programmer's perspective. As long as programmer has guarded areas
+ * which perform writes to CSR_SSP properly, shadow stack pivoting is not possible. Since
+ * CSR_SSP is writeable by user mode, it itself can setup a shadow stack token subsequent
+ * to allocation. Although in order to provide portablity with other architecture (because
+ * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expectation of a token
+ * flag in flags and if provided in flags, setup a token at the base.
+ */
+
+ /* If there isn't space for a token */
+ if (set_tok && size < SHSTK_ENTRY_SIZE)
+ return -ENOSPC;
+
+ if (addr && (addr & (PAGE_SIZE - 1)))
+ return -EINVAL;
+
+ aligned_size = PAGE_ALIGN(size);
+ if (aligned_size < size)
+ return -EOVERFLOW;
+
+ return allocate_shadow_stack(addr, aligned_size, size, set_tok);
+}
diff --git a/include/uapi/asm-generic/mman.h b/include/uapi/asm-generic/mman.h
index 57e8195d0b53..9cfb3c1e337d 100644
--- a/include/uapi/asm-generic/mman.h
+++ b/include/uapi/asm-generic/mman.h
@@ -19,4 +19,8 @@
#define MCL_FUTURE 2 /* lock all future mappings */
#define MCL_ONFAULT 4 /* lock all pages that are faulted in */
+/* Set up a restore token in the shadow stack */
+#define SHADOW_STACK_SET_TOKEN (1ULL << 0)
+/* Set up a top of stack marker in the shadow stack */
+#define SHADOW_STACK_SET_MARKER (1ULL << 1)
#endif /* __ASM_GENERIC_MMAN_H */
--
2.45.0
next prev parent reply other threads:[~2024-10-01 16:07 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-01 16:06 [PATCH 00/33] riscv control-flow integrity for usermode Deepak Gupta
2024-10-01 16:06 ` [PATCH 01/33] mm: Introduce ARCH_HAS_USER_SHADOW_STACK Deepak Gupta
2024-10-01 16:06 ` [PATCH 02/33] mm: helper `is_shadow_stack_vma` to check shadow stack vma Deepak Gupta
2024-10-01 16:06 ` [PATCH 03/33] riscv: Enable cbo.zero only when all harts support Zicboz Deepak Gupta
2024-10-01 16:06 ` [PATCH 04/33] riscv: Add support for per-thread envcfg CSR values Deepak Gupta
2024-10-01 16:06 ` [PATCH 05/33] riscv: Call riscv_user_isa_enable() only on the boot hart Deepak Gupta
2024-10-01 16:06 ` [PATCH 06/33] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv Deepak Gupta
2024-10-01 16:06 ` [PATCH 07/33] riscv: zicfilp / zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2024-10-02 21:03 ` Rob Herring
2024-10-01 16:06 ` [PATCH 08/33] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2024-10-01 16:06 ` [PATCH 09/33] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2024-10-01 16:06 ` [PATCH 10/33] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2024-10-01 16:06 ` [PATCH 11/33] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2024-10-01 16:06 ` [PATCH 12/33] riscv mm: manufacture shadow stack pte Deepak Gupta
2024-10-01 16:06 ` [PATCH 13/33] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2024-10-01 16:06 ` [PATCH 14/33] riscv mmu: write protect and shadow stack Deepak Gupta
2024-10-01 16:06 ` Deepak Gupta [this message]
2024-10-01 16:06 ` [PATCH 16/33] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2024-10-07 8:17 ` Zong Li
2024-10-07 23:30 ` Deepak Gupta
2024-10-08 5:16 ` Zong Li
2024-10-08 5:31 ` Deepak Gupta
2024-10-08 6:18 ` Zong Li
2024-10-08 6:27 ` Deepak Gupta
2024-10-01 16:06 ` [PATCH 17/33] prctl: arch-agnostic prctl for shadow stack Deepak Gupta
2024-10-01 16:15 ` Mark Brown
2024-10-01 21:46 ` Deepak Gupta
2024-10-01 16:06 ` [PATCH 18/33] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2024-10-01 16:06 ` [PATCH 19/33] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2024-10-01 16:06 ` [PATCH 20/33] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2024-10-01 16:06 ` [PATCH 21/33] riscv/traps: Introduce software check exception Deepak Gupta
2024-10-01 16:06 ` [PATCH 22/33] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2024-10-04 1:20 ` kernel test robot
2024-10-01 16:06 ` [PATCH 23/33] riscv signal: save and restore of shadow stack for signal Deepak Gupta
2024-10-01 16:06 ` [PATCH 24/33] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2024-10-01 16:06 ` [PATCH 25/33] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2024-10-01 16:06 ` [PATCH 26/33] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2024-10-01 16:06 ` [PATCH 27/33] riscv: Add Firmware Feature SBI extensions definitions Deepak Gupta
2024-10-01 16:06 ` [PATCH 28/33] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2024-10-01 16:06 ` [PATCH 29/33] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2024-10-01 16:06 ` [PATCH 30/33] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2024-10-01 16:06 ` [PATCH 31/33] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2024-10-01 16:06 ` [PATCH 32/33] riscv: Documentation for shadow stack on riscv Deepak Gupta
2024-10-01 16:06 ` [PATCH 33/33] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2024-10-02 23:18 ` Shuah Khan
2024-10-03 11:03 ` Mark Brown
2024-10-03 23:04 ` Shuah Khan
2024-10-03 23:12 ` Edgecombe, Rick P
2024-10-04 18:59 ` Deepak Gupta
2024-10-06 13:29 ` [PATCH 00/33] riscv control-flow integrity for usermode patchwork-bot+linux-riscv
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