[linux-next:master 4036/7797] drivers/clk/rockchip/clk-rk3128.c:582:40: error: use of undeclared identifier 'CLK_NR_CLKS'

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head:   f76698bd9a8ca01d3581236082d786e9a6b72bb7
commit: 9f22b4fbd4c6d27ca4e5f8fa6632e6d7a846af28 [4036/7797] dt-bindings: clock: rk3128: Drop CLK_NR_CLKS
config: arm-defconfig (https://download.01.org/0day-ci/archive/20240624/202406240243.f4Ux9lv5-lkp@intel.com/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240624/202406240243.f4Ux9lv5-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202406240243.f4Ux9lv5-lkp@intel.com/

Note: the linux-next/master HEAD f76698bd9a8ca01d3581236082d786e9a6b72bb7 builds fine.
      It may have been fixed somewhere.

All errors (new ones prefixed by >>):

>> drivers/clk/rockchip/clk-rk3128.c:582:40: error: use of undeclared identifier 'CLK_NR_CLKS'
           ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
                                                 ^
   1 error generated.


vim +/CLK_NR_CLKS +582 drivers/clk/rockchip/clk-rk3128.c

f6022e88faca1a Elaine Zhang 2017-06-02  570  
334614058886fc Elaine Zhang 2017-08-01  571  static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
f6022e88faca1a Elaine Zhang 2017-06-02  572  {
f6022e88faca1a Elaine Zhang 2017-06-02  573  	struct rockchip_clk_provider *ctx;
f6022e88faca1a Elaine Zhang 2017-06-02  574  	void __iomem *reg_base;
f6022e88faca1a Elaine Zhang 2017-06-02  575  
f6022e88faca1a Elaine Zhang 2017-06-02  576  	reg_base = of_iomap(np, 0);
f6022e88faca1a Elaine Zhang 2017-06-02  577  	if (!reg_base) {
f6022e88faca1a Elaine Zhang 2017-06-02  578  		pr_err("%s: could not map cru region\n", __func__);
334614058886fc Elaine Zhang 2017-08-01  579  		return ERR_PTR(-ENOMEM);
f6022e88faca1a Elaine Zhang 2017-06-02  580  	}
f6022e88faca1a Elaine Zhang 2017-06-02  581  
f6022e88faca1a Elaine Zhang 2017-06-02 @582  	ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
f6022e88faca1a Elaine Zhang 2017-06-02  583  	if (IS_ERR(ctx)) {
f6022e88faca1a Elaine Zhang 2017-06-02  584  		pr_err("%s: rockchip clk init failed\n", __func__);
f6022e88faca1a Elaine Zhang 2017-06-02  585  		iounmap(reg_base);
334614058886fc Elaine Zhang 2017-08-01  586  		return ERR_PTR(-ENOMEM);
f6022e88faca1a Elaine Zhang 2017-06-02  587  	}
f6022e88faca1a Elaine Zhang 2017-06-02  588  
f6022e88faca1a Elaine Zhang 2017-06-02  589  	rockchip_clk_register_plls(ctx, rk3128_pll_clks,
f6022e88faca1a Elaine Zhang 2017-06-02  590  				   ARRAY_SIZE(rk3128_pll_clks),
f6022e88faca1a Elaine Zhang 2017-06-02  591  				   RK3128_GRF_SOC_STATUS0);
334614058886fc Elaine Zhang 2017-08-01  592  	rockchip_clk_register_branches(ctx, common_clk_branches,
334614058886fc Elaine Zhang 2017-08-01  593  				  ARRAY_SIZE(common_clk_branches));
f6022e88faca1a Elaine Zhang 2017-06-02  594  
f6022e88faca1a Elaine Zhang 2017-06-02  595  	rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
f6022e88faca1a Elaine Zhang 2017-06-02  596  			mux_armclk_p, ARRAY_SIZE(mux_armclk_p),
f6022e88faca1a Elaine Zhang 2017-06-02  597  			&rk3128_cpuclk_data, rk3128_cpuclk_rates,
f6022e88faca1a Elaine Zhang 2017-06-02  598  			ARRAY_SIZE(rk3128_cpuclk_rates));
f6022e88faca1a Elaine Zhang 2017-06-02  599  
f6022e88faca1a Elaine Zhang 2017-06-02  600  	rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),
f6022e88faca1a Elaine Zhang 2017-06-02  601  				  ROCKCHIP_SOFTRST_HIWORD_MASK);
f6022e88faca1a Elaine Zhang 2017-06-02  602  
f6022e88faca1a Elaine Zhang 2017-06-02  603  	rockchip_register_restart_notifier(ctx, RK2928_GLB_SRST_FST, NULL);
f6022e88faca1a Elaine Zhang 2017-06-02  604  
334614058886fc Elaine Zhang 2017-08-01  605  	return ctx;
334614058886fc Elaine Zhang 2017-08-01  606  }
334614058886fc Elaine Zhang 2017-08-01  607  

:::::: The code at line 582 was first introduced by commit
:::::: f6022e88faca1a6a21cbd0f009b477bc530b9cc7 clk: rockchip: add clock controller for rk3128

:::::: TO: Elaine Zhang <zhangqing@rock-chips.com>
:::::: CC: Heiko Stuebner <heiko@sntech.de>

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